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I would like to make my own MOSFET driver, as it is pretty hard to find specifically what I am looking I am making my own.

schematic

simulate this circuit – Schematic created using CircuitLab

The stars of my driver are the NSS40300 (PNP) and the NSS40301 (NPN).

Will I be able to switch a 1MHz square wave with this driver alone (not considering the MOSFET capacitance?) The NPN is rated at 215MHz while the PNP is rated at 160MHz so am I right to assume that 1MHZ switching should be no problem for these transistors?

Is it overkill to use a 2W transistor for this application? Is 1W to much? R1 will also be taking many pulses. Will a 2W R1 be sufficient?

Resistor selection, R1 is easy to calculate, I just have to limit the current to 3 A which my transistors are rated at the highest possible voltage, R = V/I = 30/3 = 10 ohms. R3 on the other hand I'm not sure. I would like to not waste much power as possible so I would like to know the highest possible resistance for R3 at 3A output.

Lastly am I missing something? Is this a robust design? Are there other things I should consider?

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  • \$\begingroup\$ NPN is rated at 215MHz That is probably the \$f_t\$ which is a number that is measured under very ideal conditions. In typical circuits it depends on the circuit what bandwidth you get. not considering the mosfet capacitance So you want to ignore the main speed-limiting factor? Why? I suggest building this circuit in a simulator (like LTSpice) and simulate to see what speed can be achieved. My guess is that 1 MHz will be possible but the switching might not be as ideal as you would like. If you want a robust design, use a gate driver chip. \$\endgroup\$ Jun 29, 2021 at 17:46
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    \$\begingroup\$ I'll second a gate driver ic, it will work much better with less power wasted than this circuit. Consider that 30V is getting pretty high for the gate-source voltage of the MOSFET. You may need to rethink parts of the design. \$\endgroup\$
    – W5VO
    Jun 29, 2021 at 18:09
  • \$\begingroup\$ @Bimpelrekkie I want to focus on the driver itself first before it will be limited by the mosfet. i did try to find for spice models of the transistor but there are none and looking into how to make a model from a datasheet is just a rabbit hole. \$\endgroup\$
    – DrakeJest
    Jun 29, 2021 at 18:21
  • \$\begingroup\$ When switching, it's charge storage time that matters more than transition frequency. You'd want to run the BJTs in forward-active mode (which would waste a lot of power!) if you want to get that high of a frequency, and even then you probably won't. But I would also like to ask, why not just use a driver IC? It makes things so much easier to just slap in an IXDI614 or something. \$\endgroup\$
    – Hearth
    Jun 29, 2021 at 18:25
  • \$\begingroup\$ I want to focus on the driver itself first before it will be limited by the mosfet The input capacitance of the MOSFET IS the main limitation of this circuit. Suppose that without the MOSFET the driver could easily do for example 10 MHz. There's no point in making that 20 MHz when adding the MOSFET limits the speed to 1 MHz. It is fine that you're looking for ways to make problems smaller (I do this all the time) but those have to be independent problems. If you split an "unsplittable" problem, you're only fooling yourself. Fine be me but not a good design strategy. \$\endgroup\$ Jun 29, 2021 at 18:35

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Reference Design

Fundamentals of MOSFET and IGBT Gate Drive Circuits

https://www.ti.com/lit/ml/slua618a/slua618a.pdf?ts=1624976704296&ref_url=https%253A%252F%252Fwww.google.com%252F

Figure 20 on page 27 is inserted below:

Discrete PMOS High Side Gate Drive

One of the drawbacks of this circuit is that VDRV is still a function of the input voltage due to the R1, R2 divider. In most cases protection circuits might be needed to prevent excessive voltage across the gate-to-source terminals. Another potential difficulty is the saturation of the npn level shift transistor,which can extend the turnoff time otherwise defined by R1 and RGATE. Fortunately both of these shortcomings can be addressed by moving R2 between the emitter of QINV and GND. The resulting circuit provides constant gate drive amplitude and fast, symmetrical switching speed during turn-on and turn-off. The dv/dt immunity of the driver scheme is primarily set by the R1 resistor. A lower value resistor will improve the immunity against dv/dt induced turn-on but also increases the power losses of the level shifter. Also,notice that this solutionhas a built in self-biasing mechanism during power up. While the PWM controller is still inactive, QINV is off and the gate of the main MOSFET is held below its threshold by R1 and the upper npn transistor of the totempole driver. Pay specific attention to rapid input voltage transients though as they could cause dv/dt induced turn-on during the off state of the P-channel MOSFET transistor. In general, the DC level shift drivers have relatively low efficiency and are power dissipation limited above a certain input voltage level.The fundamental trade-off is to balance the switching speed and the power consumption of the level shifter to meet all requirements under the entire input voltage range.

I assume the application requires a high side MOSFET and driver circuit because typically a low side MOSFET and driver circuit are less expensive with improved performance.

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