So, how do processors deal with the frequencies in the range of 20-100 GHz?
Even if we consider a demodulation of data to lower frequencies from carrier frequencies, there needs to be a computing piece for doing that.
No, there doesn't. There needs to be an analog piece for doing that.
Note that our goal is to design a circuit which takes the radio wave as an input, and produces the bits that the sender was trying to send as an output, and the bits are a much slower signal than the radio wave.
One typical way to do that, nowadays, is to first use analog filters to cancel out frequencies which are not the ones you are trying to receive, then use an analog mixer to shift the frequency down to a lower frequency, then feed that into an analog-to-digital converter. Now you still have a processing problem, but it's a slower processing problem. If your signal takes up 50.000-50.100GHz, you can shift it down to 0-0.1GHz = 0-100MHz (or maybe you might prefer 10-110MHz for various reasons). Now you just have a 100MHz or 110MHz signal to deal with.
You still have to process it though. So how might you do that? One way is to use a specialized computer chip - a Digital Signal Processor, or DSP - which is designed for exactly the kind of processing needed to receive radio signals. If you can run it at 500MHz, you still have only 5 instructions per cycle of your signal, but if you cut enough corners, it might be enough. You might be surprised how many corners you can cut. You will have the ability to run instructions in parallel, so perhaps you can process a group of 4 cycles together, in 20 instructions. A DSP is designed to get maximum number crunching for your buck, running the same code over and over. No branch predictors or caches here, just raw throughput.
Maybe you can't get a DSP fast enough. What other options do you have? One option is to split the signal in half. Instead of sending a 100MHz wide signal, split the data up, send 4 25MHz wide signals and then join the data together again after it's received.
Or, you can try an even faster processing device. An FPGA you string together as many separate processing stages as you can physically fit. If you need to add numbers at 200MHz... you can do that. If you need to add 50 numbers... you can still do it at 200MHz, but it will take up 50 times as much space because you actually set up 50 separate addition circuits on the chip, unlike a traditional processor, which only has a small number of addition circuits and has to reuse them 50 times in a loop.
If you are a big company that wants to produce 100000 of the same product, you might want to actually make a custom chip. It's pretty similar to an FPGA in principle, except you can't reprogram it, performance is better in every aspect, and it costs about ten million dollars to design so you'd better get it right the first time.
By the way, if you're wondering, in the old days, obviously there were no DSPs processing our signals - just analog circuits all the way through. But it turns out analog circuits are worse than DSPs, if your frequency is low enough to use one. They're more expensive, they're bigger, some of them use more power, and even worse, the laws of physics stop them from being shrunk down to mobile phone size. Yeah, today's phones would be impossible with that technology.