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In the application note for ILD8150 at chapter 2.2.7 I read:

The high-side MOSFET gate driver is supplied by the bootstrap circuit. Capacitor CBOOT is charged when the high-side MOSFET is switched off and the diode D conducts current from VCC. CBOOT can be calculated as:

๐ถ๐ต๐‘‚๐‘‚๐‘‡ > ๐‘„๐บ / โˆ†๐‘‰๐ถ๐‘๐‘œ๐‘œ๐‘ก

Where QG is the internal MOSFET gate charge, 2.5nC and โˆ†VCBOOT is voltage deviation on the bootstrap capacitor.The internal supply circuit provides voltage to the bootstrap capacitor VCboot โ‰ˆ 8.6 V,which is a little higher than VCC. This circuit helps to maintain the voltage in dim-to-off and standby conditions. Higher voltage improves the RON of the internal MOSFET.

I understand that VCboot is 8.6 V, but what do they mean with "delta" in this context? Perhaps the voltage across Cboot? VCBoot - VCC = 8.6 V - 7.3 V = 1.3 V

Both values are constant, so why do they provide the formula only and not the recommended value for the capacitor? I mean, I cannot change the QG neither โˆ†๐‘‰๐ถ๐‘๐‘œ๐‘œ๐‘ก, can I?

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    \$\begingroup\$ โˆ†Vboot is the ripple voltage C ratio, roughly. Yet app note merely says chosen 0.22uf but schematic and BOM show 22 nF \$\endgroup\$ Jul 9, 2021 at 20:56

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'delta' means the change in the BOOT voltage from the initial charged value to the value after the gate charge has been (re)supplied to the high-side FET. The gate charge is 2.5 nC; so if you have a 25 nF capacitor, the voltage will discharge by V=Q/C = 2.5n/25n = 0.1 V. So, even if initially charged to 8.6 V, you will only actually get 8.5 V across VGS of the FET.

This isn't a significant amount, but there is little point in minimizing CBOOT.

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