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The problem

I recently had a situation where a board had a destructive fail event from turning on a 53V battery which appeared to have had a voltage spike at least over 80V, most likely well over 100V, because of the damage it caused. I had thought of this, and attempted to protect the circuit from this, and placed a 48V nominal TVS diode in part of the input circuit, but obviously in the wrong place.

Here's my circuit as reference, the rest of the board doesn't really matter (but note, the H-bridge after this input protection circuit had multiple failed MOSFETs afterwards from Vds limit breakdowns.

circuit which failed

Note D19 is the 48V Nominal TVS diode (typical clamp starts at 56V, 1ma current flowing). There was catastrophic failure of the input circuitry shown as Q1, and ALL 3 of the 0.1uF 100V rated ceramic capacitors exploded in addition to the P-channel switch MOSFET Q1.

failed parts

It's likely that the TVS diode I had put in there for protection simply wasn't able to respond to the spike because it's on the wrong side of the Q1 FET. The design intent was more to protect the on-board H-bridge MOSFETS and absorb energy which was put into the 48V bus from the freewheeling diodes and share it with the nearby positioned capacitor C1.

So my question is, for the situation of input connector power supply turn-on inductor spikes, what is the best practice protection circuit?
In my particular case the voltages are 40->55V from a lithium battery pack with a mechanical on/off disconnector switch and some non-ideal cables/wires used to hook everything up. Current for this board is expected to be < 10A Continuous, with 30A peaks.

Wire inductance calculator gives me values around 6uH inductance for a 2m long cable (~3uH each way in the loop), but I'm not sure how to estimate/calculate the voltage spike potential that has when suddenly going from 0V to 53V.

Protection method 1:

Increase bulk input capacitance - wire inductance and resistance combined with a big capacitor (with low ESR) will reduce/avoid voltage spikes, because the capacitor reacts to the sudden change in voltage with a lower impedance during the spike itself, soaking up the energy.

schematic

simulate this circuit – Schematic created using CircuitLab

Protection method 2:

Placing Transient Voltage Suppressor (TVS) diode (or a Varistor!) right at the input connector and rated for the maximum clamping voltage required to protect any downstream components. Risk here is that the TVS will have a sustained over-voltage condition, so fuses or sacrificial input resistor with lower power rating could be used to limit catastrophic damage.

schematic

I have a useful spaced input connector which allowed me to suggest to the end-user that they solder a spare SM6T56A TVS diode (same as D19 in the schematic above) across the connector pins on the back side of the board, which hopefully will work for now!

solder TVS across input terminals

What other protection techniques are there? Any good tips on this sort of protection circuit? What is a good typical input capacitance to avoid voltage spikes?

Note on other questions on this site:

Someone had a similar fundamental question which didn't receive any conclusive answers/suggestions - ee.se link

A great answer from Pete W for power line input protection of 24V devices is here: ee.se link

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  • \$\begingroup\$ Did it ever work without current limiting the zener? Inductors don’t spike from turn-on, only turn off. \$\endgroup\$ Jul 11, 2021 at 19:45
  • \$\begingroup\$ So isn't the gate of Q1 be about 0V when 56V is applied to source? The gate can handle only 20V, and the gate capacitor C6 is not going to be immediately clamped to 15V by the zener D1. What was the power sequencer Q2 doing, was the 12V on or off when 56V was applied? \$\endgroup\$
    – Justme
    Jul 11, 2021 at 19:58
  • \$\begingroup\$ @TonyStewartEE75 current limiting which Zener? The Q1 gate protection zener? or the TVS diode? These boards have worked fine in dozens of power on/off cycles, just this one time blew everything up. \$\endgroup\$
    – KyranF
    Jul 11, 2021 at 20:20
  • \$\begingroup\$ @Justme the 12V shown here turns on 'at the same time' as the 48V input, as they both come in from the same source - however there's a small start-up delay because the main 48V goes to a DC-DC converter on another board (the 'control board'), which makes the 12V which comes into the board here and turns on Q1 when the 12V is energized. It's to prevent the motor power bus being energised while none of the FETs or control chip are energised yet. \$\endgroup\$
    – KyranF
    Jul 11, 2021 at 20:26
  • \$\begingroup\$ I meant the 12V Zener \$\endgroup\$ Jul 12, 2021 at 1:32

2 Answers 2

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There seems to be a problem with the power sequencer for on and off. Although there are a lot of unknowns with CAP ESR and Motor DCR and it’s stored Energy, there are a lot of stress transients, which are made worse by the storage caps.

e.g.

  • from Ic=CdV/dt from 0 to 50V limited by ESR. Replace the 2x 100uF with RF caps.

  • When 12V slew rate is reduced with all 100nF caps the PCh FET can get a surge of power loss partially conducting with whatever the motor current is being drawn at the time during turn on and off. Replace those with much smaller caps or none.

  • put the two 100uF across the battery instead.

  • Consider PWM for soft acceleration and braking.

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Yes this is a common problem. When you apply voltage the wire inductance 'winds up' while charging your board capacitance. Then it overshoots.

Solution #1 won't work. More C means more time to charge means the inductor 'winds up' for even longer. The voltage spike is the same but with even more energy behind it.

Solution #2, a TVS can work but TVS's won't clamp very precisely and will still allow significant overshoot. They're also at risk for breakdown overtime if not specified properly.

The proper solution is a soft start. Anytime a switch (relay, mosfet etc) is followed by significant C you want to turn on slowly. If the switch is a fet you can do this by slowly slewing the gate. If the switch is a relay it's common to add a second 'precharge' switch with an R in series.

In your case I'm guessing the problem is when your PFET turns on, not the battery. Add an R between the Nfet and Pfet and/or add even more R in series with the Nfet gate to slow things down.

Note this has its own risks as it shifts the problem to the fet which will spend more time in the linear region where overheating and breakdown are possible if not properly specified (see the 'SOA' chart).

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