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I am having problem with understanding the purpose of the Q7 transistor. PNP.

PNP2The anode of the D4 diode is connected to the base and cathode - to the emitter which makes Veb = -0.7V. This will always make the PNP transistor be on the OFF mode no matter what the base voltage is. It seems that if I remove Q7 transistor nothing will be affected and the rest of the circuit will work just same. However, it is not. When I remove it the whole circuit stops working properly. Could anyone explain to me what I am missing here. Thank you

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    \$\begingroup\$ Your circuit is almost certainly drawn wrong. Much wider context and more circuitry would help. Knowing where the emitter connects to may help. If the pulse was -ve going may make somesense.a few more resistors seem likely. ||| More Detail!!! \$\endgroup\$
    – Russell McMahon
    Commented Jul 14, 2021 at 7:03
  • \$\begingroup\$ I have added a better image of the circuit \$\endgroup\$
    – Nicat Ali
    Commented Jul 14, 2021 at 7:31
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    \$\begingroup\$ We need even more details, just show the complete circuit because as shown, the circuit does not make a lot of sense. \$\endgroup\$ Commented Jul 14, 2021 at 7:42
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    \$\begingroup\$ @jonk I didnt see your first comment. Thank you sooo much. It helped a lot \$\endgroup\$
    – Nicat Ali
    Commented Jul 14, 2021 at 8:07
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    \$\begingroup\$ @jonk yeah I was only concentrated on Q7 and D4 so I missed that the gate of the Q8 is also connected to the emitter and its voltage is higher than the base voltage during the transision. Thanks again to all of you :) \$\endgroup\$
    – Nicat Ali
    Commented Jul 14, 2021 at 8:38

1 Answer 1

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Summary:

The postive pulses via the two parts of D4 drive the FET gate on.

In the absence of positive drive Q7 & R31 drive the FET gate off.

The transistor provides far more current drive than a pull-down resistor would, and so ensures far faster turn off, and draws minimal current when positive drive pulses are applied.


FET turn on: When a positive pulse is applied Q7 is turned off as its base is driven to about -0.6V relative to its emitter. The FET is driven on by the postive pulse via D4.

FET turn off: When the positive pulse is removed (either open circuit or grounded) then Q7 emitter is at V_gate and it's base is pulled to close to ground via R31. V_r31 will be about (Vgate- Vbe_Q7)/R31 or for VGate = say about 11V early on, (11-0.6)/10k or about 1 mA.
For a BC856 the beta (current gain) at 100 mA colletor current is about 100 so the ~= 1 mA base drive will drive it into saturation.
Vce can drop to about 0.1 - 0.2 V with adequate base drive BUT as the base drive is provided by Vcb it will probably end up at around Vce = 0.5V ultimately and at somewhere under 1V reasonably rapidly.

The IRFZ44V MOSFET has a Vgs_on of 2V min & 4V max, so the under 1V Vbe level achieved by Q7 is enough to turn and hold it off.

IRFZ44V has a gate charge of 65 nano-Coulomb max so at 100 mA discharge it will be discharged in about 700 ns.
However, discharge rate will drop as Vgate drops providing less V_R31 andf so less base current so turnoff time will probably be in the order of 1 microsecond.

Decreasing R31 will increase gate capacitance discharge time up to the capacity of Q7. A BC807-40 would give usually faster gate switching times (if needed) due to higher beta and higher current rating.


D5 acts to damp gate oscillations by clamping negative Vgs ringing excursions. It should be mounted physically as close to the FET g-s leads as possible.

If inductive loads are being switched an extremely useful addition is a reverse biased Vgs connected zener (in parallel with D5 and also close to the FET g s leads physically) with a zener voltage rating slightly above Vgate-drive_max. The zener serves to clamp Miller capacitance coupled drain spikes from the inductive load and greatly improves the survival of the FET.

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