# IIR filter design: detect limit-cycle oscillations

I am studying IIR filters read about limit-cycle oscillations in IIR filters. From what I understand, there are two types of oscillations

• Granularity limit-cycle: when signal levels become very low or constant for a period of time, the filter can lock into unstable modes and generate low-level output oscillations. This is caused by quantization errors.
• Overflow limit-cycle: oscillations can appear (as large as the maximum signal range) due to overflow.

Knowing the transfer function of the IIR filter, is there any way to predict if these errors can occur knowing the coefficients of my filter? My guess is that this has to do with the denominator coefficients since this behaviour is exclusiveto IIR filters and not FIR filters. Can someone please help me? Thank you!

EDIT:

An example I came across with

$$T(z)=\frac{a_0+a_1z^{-1}+a_2z^{-2}}{1-b_1z^{-1}-b_2z^{-2}}$$

$$a_0=a_2=0.00118011$$ $$a_1=-0.00155979$$ $$b_1=1.95961$$ $$b_2=-0.960411$$

It is justified that this filter suffers from limit-cycle overflow because:

$$-b_2-(-b_1)>1$$

It is said the there is an alternate output.

• The first one can be detected simply by giving step inputs of various amplitudes and simply monitoring the output for a long time ? This of course must be done in the target platform or in a simulation where quantisation is simulated.
– AJN
Jul 16, 2021 at 2:30
• @AJN I'm talking about doing by hand, checking the coefficients... Jul 16, 2021 at 2:42

Knowing the transfer function of the IIR Filter is there any way to predict if this errors can occur knowing the coefficients of my filter.

No. It's not possible knowing only the coefficients. You have to know how the arithmetic is being done, specifically the rounding between calculating products and retaining the result in the filter.

Consider the simplest lag filter $$\y_{n+1}=(1-k)y_n+kx_n\$$ and its 'limit cycle' at DC. It will produce different results at infinite time for rounding up, down, or 'to even' after the multiply. Increasing the number of bits in the y representation will reduce the amplitude of the error, but not eliminate it.

Higher order filters are needed to produce errors at finite frequencies, but the basic principle is the same. It's less easy to predict how it will cycle than with a simple first order filter, bit-accurate simulation is needed.

If you run an IIR filter with IEE754 arithmetic in a computer, the effect is often masked by the fact that we usually present the results to fewer than the 56 bits of precision used by default doubles, and we tend to be unfazed by a number being off by .0000000000000001 or so if we do get to see the whole thing.

The effect bites when we implement in hardware, and restrict the y to a cheaper short fixed point. Then we have an error/cost tradeoff to make.

• Hey Neil, thank you for your answer. I will provide an example that I came across and maybe you can help me seeing it Jul 16, 2021 at 16:31
• Just did it! Please check it out Jul 16, 2021 at 18:10