# Understanding different crystal designs

I'm having trouble understanding around how this crystal design works:

They place a capacitor between the XI and XO pins (is this called a load capacitor?), whereas all other crystal designs I've seen place 2 capacitors, one between XI and ground and another between XO and ground.

From a retail board I bought, with the ASM1061 chip populated:

It appears that they are using a 10pF capacitor as "External Load Capacitance" defined in the datasheet under the "Clock Oscillator" section, however it seems the board was populated with a simple crystal, not an oscillator.

I tried using the below crystal design (as is found in most places), but it did not work. Only placing a 10pF capacitor between the XO/XO pins allowed the chip to boot properly. Can you help me understand why?

Thanks!

• Does the datasheet state what oscillator topology is being used? The necessary passives can very well depend on the topology, but I'm not familiar with one that needs just that capacitor, off the top of my head and with my limited practical experience with oscillator design. Commented Jul 16, 2021 at 19:17
• Maybe they are running the crystal in pseudo parallel resonance? Commented Jul 16, 2021 at 20:13

This is called a Pierce oscillator. The inverter and resistor of the pierce oscillator are built into the microprocessor.
(See Wikipedia article https://en.wikipedia.org/wiki/Pierce_oscillator)

Think of a crystal as lump circuit equivalent to having inductance, capacitance and resistance. The capacitor value are set so the oscillator can resonant at it's Crystal resonant frequency. These value are usually provided by the crystal manufacturer.

• The prototypical pierce oscillator is the one that the OP tried with two capacitors, which did not work for the OP (checking both wikipedia and the relevant text from Razavi) Do you have a citation or derivation showing a pierce oscillator in particular working with the single capacitance shown in the datasheet excerpt? Commented Jul 17, 2021 at 2:02

The fundamental design idea of a 'parallel resonant crystal circuit' is that it has a capacitor in parallel to a crystal. Internally, this capacitor is the plate capacitance of the crystal contacts, and other physical characteristics of the crystal and package. To make the resonant point less dependent on package and board placement, a 'parallel resonant crystal' has a specification for an external capacitance, which reduces the effect of the crystal package, and allows adjustment for the effect of external connections.

The crystal and load capacitance don't have to be earthed anywhere, or connected to anything, or can be earthed anywhere. That doesn't affect resonance. The amplifier has to have a differential input. The differential input isn't shown on 'pictures', but if it doesn't have a differential input, it's not an amplifier. The differential input doesn't have to be referenced to ground, in practice sometimes amplifiers are single sided, and sometimes they are floating, and sometimes they are dual supply.

Colpitts and Pierce developed resonant circuit designs for high-voltage vacuum tube amplifiers. These designs were both parallel resonant circuits, but were earthed differently and connected differently. The Pierce circuit didn't put a large bias voltage across the resonant circuit.

A derivative of the Pierce circuit is often used for uProcessor oscillator design. This is the circuit you have shown with two capacitors. As with the original Pierce design, the point of the earth is not to make the crystal circuit resonant: it is to correctly reference the amplifier input and output.

If an amplifier designer / uP producer shows a 'picture' of a crystal oscillator circuit, you have to decide, based on other information provided, what the 'schematic' should look like, and what the 'layout' should look like. A parallel resonant crystal oscillator might be a 'Pierce' design, with two earthed capacitors, or it might not.