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I want to know how to stream data from my PC to my FPGA and from FPGA back to my PC. I have a cmod A7 artix 35-t Xilinx FPGA. I have read some responses online but a lot seems to be quite high level and there are no sure details. I have heard, using ethernet protocol to send the data packets, USB, DMA's. Has anyone had any prior experience with implementing streaming of data back and forth from the FPGA and PC?

Also would this be possible to implement in VHDL? If so, what would be the procedure?

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    \$\begingroup\$ Yes, I've done it with high-speed USB, PCIe and with Gigabit Ethernet. Do you have an actual engineering question, or are you just taking a survey? Perhaps you should tell us something about your requirements in terms of bandwidth, latency and other relevant application details. \$\endgroup\$
    – Dave Tweed
    Jul 18, 2021 at 3:18
  • \$\begingroup\$ Any data transfer rate up to 10Mbps would be fine, but im interested in how to implement it in VHDL, is this possible without using any IP cores provided from vendors? \$\endgroup\$ Jul 18, 2021 at 3:29
  • \$\begingroup\$ Find where you can buy an appropriate ip core \$\endgroup\$
    – user76844
    Jul 18, 2021 at 3:36
  • \$\begingroup\$ Is this the only option, is it too difficult to implement using VHDL? \$\endgroup\$ Jul 18, 2021 at 3:40
  • \$\begingroup\$ USB was done with a chip from FTDI that has a FIFO interface, without using any vendor IP. \$\endgroup\$
    – Dave Tweed
    Jul 18, 2021 at 11:13

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The Artix device on that board doesn’t offer any PHY options, so whatever scheme you choose will have to connect your PC using some kind of support bridge.

One reasonable choice would be a USB to FIFO interface like the FTDI FT600. You could also consider an eMMC or SDIO bridge, which will be more complex due to their protocols. SPI is also possible, assuming you have a suitable bridge. You could also consider a UTMI+ or ULPI bridge to USB.

Unfortunately there’s not enough on that Artix to much more than that with a modern PC. The XA35T does have a version with a PCIe hard core and PHYs pinned out, but not on the Digilent CMOD.

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  • \$\begingroup\$ Thanks maybe im looking to add a network interface like \$\endgroup\$ Jul 18, 2021 at 13:30
  • \$\begingroup\$ store.digilentinc.com/pmod-nic100-network-interface-controller \$\endgroup\$ Jul 18, 2021 at 13:30
  • \$\begingroup\$ Yes, that could be interfaced to the board physically. The issue will be that to support the higher layers of the IP stack you’ll need a CPU. The XA35T is a small device, you’ll need to see if there’s enough resources for this and whatever your user logic needs. \$\endgroup\$ Jul 18, 2021 at 13:59
  • \$\begingroup\$ Ahh okay, so the FPGA needs enough hardware resources to implement the communication protocol. Ill look into it, thanks for your help! \$\endgroup\$ Jul 18, 2021 at 17:10
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I think the easiest way to communicate between PC and Xilinx FPGAs is to use a ready build Ethernet core from FPGA-cores.com. You can find them here. These are free to use if it is for personal non commercial use.

However on the CMOD A7 there is no Ethernet phy so you need to add something like the common LAN8720 with almost a pmod connector. You need to connect the tx1 pin with a patch.

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