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Many tutorials on castellated half-holes are for designing the half-holes themselves (OSH Park, and Danny Staple's question). There are very little documents on how to design the pads for receiving the castellated daughter boards. In cholz's question, the answer refers to a SparkFun tutorial. However, the tutorial only concerns about soldering and there is no specification to the surface mount pads.

Therefore, what are the design guidelines for the those pads?

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As with all footprint-related questions, it depends on the specifics:

  • What is the placement method? Pick'n'place or manual placement?
  • Reflow or hand soldering?
  • Density requirements on the host PCB?
  • Leaded or lead-free solder?
  • etc. etc.

To get started, I would recommend modifying the guidance from the ESP32 datasheet here - look at their castel-to-hole size ratios and modify from there to suit your particular module. The ESP32 footprint would be a standard footprint suitable for most production processes. Then iteratively improving that if that doesn't meet your needs in practice.

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