I have to load and run firmware in RAM of an empty Cortex-M4 chip (in a manufacturing environment). The chip ordinarily expects vector table at address 0x0 in flash. When I am loading my firmware to RAM the device flash is empty. My firmware runs okay but interrupt handlers are never called. I do set VTOR to my table in RAM (and it is of course properly aligned).

I found out that when the device starts from the empty state:

  • the VECTTBL bit in HFSR is set (obviously it couldn't fetch the vectors from 0xFFFFFFFF)
  • VECTPENDING in ICSR is 3 (probably bus fault or hard fault)

If there is already some firmware in flash then my manufacturing firmware runs fine and interrupts work. Clearing the bit in HFSR does not help. Setting VECTCLRACTIVE or VECTRESET in AIRCR does not help.

Question: is there a firmware-controlled way to reset the NVIC or clear the vector table read fault?

  • \$\begingroup\$ Which M4? It might make a difference. \$\endgroup\$ Jul 20, 2021 at 12:58
  • \$\begingroup\$ Which exact MCU it is, to distinquish it from all the thousands of different MCUs from dozens of manufacturers that have a Cortex-M4 core in them? \$\endgroup\$
    – Justme
    Jul 20, 2021 at 12:58
  • \$\begingroup\$ CPU is part of an ASIC. Not available off the shelf but the CPU & memory part looks just like every other M4 (EFM32, Kinetis etc.). There are no "boot mode" or "memory remap" switches. The issue is entirely contained within the M4 subsystem. \$\endgroup\$
    – filo
    Jul 20, 2021 at 14:25
  • \$\begingroup\$ What exactly do you do to clear the VECTTBL bit? Do you try to write a 0 there? These kind of fault status bits often require that you write a 1 to clear the bit back to 0. \$\endgroup\$
    – brhans
    Jul 20, 2021 at 16:50

1 Answer 1


This entirely depends on the implementation of the Cortex M4.
The M4 itself can only recover by system reset, which resets VTOR, so that's a no-go.

Your chip however, may have a register like SYSCFG_MEMRMP in the STM32F407. Which remaps the standard boot region to somewhere else.

enter image description here

I know the LPC43xx from NXP also has a register like this.

If this is unavailable, your debugger has to set the right condition before running.


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