These spikes are symmetrical on both FETs, but each FET has no voltage ringing at all; the drains look perfect in terms of voltage. The current after the spike is about what I would expect from the system currently.
I'm not sure where this spike is originating from: the inductor is high enough that the system is in CCM, the output capacitor is not spiking, and the Rload is consistent and purely resistive. The diodes are an LTSpice component with an average current of 10A and a Vbr of 800V, so they shouldn't be breaking down.
At this point in the simulation the waveforms are being looked at the duty cycle is a consistent 22.8%.
Any help is appreciated.
EDIT The duty cycle control is two control signals with a minimum of 20% dead time, or about 2uS. Here is the subcircuit model for the transformer. Each coil pair is made of this model, there are three total to simulate the full transformer operation.