Unused Opamp Termination: How does it cause increased current consumption?

Question

Usually the following configuration for unused opamps is said to be troublesome, even for rail-to-rail input & output (RRIO) opamps. Nevertheless, it is attractive because it requires no additional components.

^{simulate this circuit – Schematic created using CircuitLab}

The reason seems to be anomalously high current consumpion due to output saturation. When the input offset voltage has the "wrong" sign, the output would need to go to a slightly negative voltage to reach equilibrium, thus saturating because it cannot achieve this.

Question:

What does this mean and why would it lead to increased current consumption ? After all, the only load on the output is a MOSFET gate which will not cause any appreciable current to flow. And all the internal gain stages are anyway operated with a constant supply current, no?

Another approach to formulate the same question is: Why is it deemed ok, to abuse such opamps as comparators, which almost always uses an open loop configuration and causes output saturation? Isn't this usecase equivalently "bad" as the one drawn above?

Answer 1

The output stage of op-amps under saturated conditions may have a bit lower output current or significantly higher supply current than the datasheet promises as a maximum. The information on behavior with saturated outputs is not typically shown directly in the datasheet, but here is one reference.

Having the op-amp biased so it cannot balance could also lead to subtle interactions between the unused op-amp and the ones that are used- particularly at low signal levels such as mV. For example, I have seen such op-amps exhibit low amplitude but high frequency oscillation when the output is very close to the supply rail. That will be coupled to other amplifiers even at DC, but more so typically at higher frequencies (TLV4316 datasheet):

Ideally, create a voltage that comfortably allows the op-amp to balance at and connect it as a unity-gain buffer. For a RRIO op-amp that could be anything within the power supply range, save for a few hundred mV at either end. The voltage doesn't even need to be constant- it could be some signal-related voltage- you might be able to use it to buffer a test point or something along those lines.

You don't always have to follow the "ideal" recommendation, but if you have to ask it may be wise to do so.

Edit: Here is a general reference from TI on what to do with unused op-amps in a package.

Answer 2

The problem with the configuration you propose is that the input of the non-inverting, unity gain op amp is tied to ground, which is all the way to one extreme of the supply range.

Ideally, you should tie the input midway, you can achieve this with a resistive divider, the value of the resistor should be chosen so that input bias currents are not problematic - probably anything between 10 kΩ and 100 kΩ works well.

There are several reasons why tying the input to one of the extremes can be a problem. Perhaps your op amp is not rail to rail and cannot output 0 V, perhaps it does not support such a low common mode, perhaps the bias currents are supposed to flow into the chip, and this cannot happen from ground if ground is the lowest potential at the chip.

As you suggest, there are additional concerns. If the input offset is "the wrong way around", even a rail to rail input/output opamp will have a hard time because you are asking for its output to go below 0 V, which it cannot do. What happens inside the op amp is chip specific, but I imagine that high current consumption is a very likely outcome. Op Amps are built to work in closed loop configuration, with the inputs very close together, and asking the output to go below 0 V is the same as working in open loop. I imagine that there are several places inside the chip where such a condition would produce unexpected behavior which increases the bias current of the various stages.

Answer 3

OA’s have complex input structures and are not designed to perform well as comparators. The input impedance of protection circuits can significantly drop the input impedance making the input current the result of increased no load current with V diff input >>0. The datasheet must specify input limits that must be followed when unused as an output. Hysteresis might help with very high R values to limit input current to the Vcm load.

Linear mode is best for unused OA’s and be aware of unity gain instability for each type.

Rail to Rail OA’s are charge controlled high gain amplifiers that draw current for each transition based on the rate of change. When the output is steady with negative feedback, it has high gain but draws low current unless DC load current involved. When stuck at either supply rail , it is also low current and of course no voltage gain.

Either way is suitable for minimizing unused OA’s for low idle current with often 1uA/ch possible or less.

However floating inputs with stray negative feedback small leakage currents causes oscillations with higher internal losses that you want to avoid as well as interference to nearby high impedance active inputs.

Worse yet exposing the floating FET input to weak EMI crosstalk current and may result in failure from EOS input voltages on RRIO OA’s.

On misuse of RRIO’s as comparators.

RRIO’s with BJT common emitter complementary types are flawed for low current when saturated on outputs.