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I'm studying the circuit block below in an Italian textbook, "Dispositivi e circuiti elettronici", by M. Gasparini, D. Mirri.

enter image description here

The circuit is called "single-ended push-pull with transformerless driver".

Without giving any comprehensive explanation, the book says that, if C2 is sufficiently high, then, dynamically:

  1. The potential on point B may rise higher than VCC
  2. The potential on point A' (which is very near to VCC in the quiescent condition), may increase by about VCC/2

Now, what is not so clear to me is how to clearly explain the 2 points above and, effectively, what is the push-pull operating class (A, B, or AB) in this condition?

I've searched in different books (and on the net) the above scheme, without finding any reference/explanation or what the circuit is called.

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  • \$\begingroup\$ It depends on values and values are sadly lacking in your schematic. You should still reference the text where it came from. \$\endgroup\$
    – Andy aka
    Jul 25, 2021 at 9:21
  • \$\begingroup\$ @Andy aka - Ok, the text is called "Dispositivi e circuiti elettronici", by M. Gasparini, D. Mirri. As per the values, please, consider that what I do not understand is the functional principle of the circuit block, and I am not interested , at this time, on the specific values...Can you help me on understand the the 2 points in the main question? \$\endgroup\$
    – barrow
    Jul 25, 2021 at 9:29
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    \$\begingroup\$ Why don't you use a free (and freely available) simulator to see why. It's all about the voltage across C1 when the circuit flips that makes point B higher than Vcc. Put the reference into the text of the question please. \$\endgroup\$
    – Andy aka
    Jul 25, 2021 at 9:36

3 Answers 3

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Answering the last question first, the T1/T2 pair must be operating class B. You would not want any significant current passing through them in the quiescent state, in order to allow the R1/R2/R1/R2 chain in the middle to hold node A at Vcc/2.

Assuming that R' is significantly less than R, then node A' will be close to Vcc in the quiescent state. This means that the voltage across C2 is close to Vcc/2.

Now suppose that the current through T3 is reduced. Since the voltage drop across the upper R drops with decreasing current through T3, the voltage at B rises faster than the voltage at A'. This drives current into the base of T1, turning it on. This will drive node A close to Vcc, and since the voltage across C2 can't change rapidly, this will drive A' above Vcc by about Vcc/2. This is a form of "bootstrapping". And even though B starts from a lower voltage in the quiescent state (presumably somewhere around Vcc/2), it too can reach a voltage that's higher than Vcc.

Basically, during this high output state, C2 is discharging through both R' (back to the power supply) and R (providing the base current for T1). That's why it has to be "sufficiently large".


Here's a simulatable version of the schematic. I'm not sure what to make of the results, however. Maybe more later.

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ Fine. Your explanation is very clear, regarding T1. Nevertheless, during this step, how T2 is performing? \$\endgroup\$
    – barrow
    Jul 25, 2021 at 13:44
  • \$\begingroup\$ It is cut off. Reducing the current through T3 drives T2's base more negative. \$\endgroup\$
    – Dave Tweed
    Jul 26, 2021 at 0:58
  • \$\begingroup\$ How stupid of me!!! What do you think about @Kevin White's answer talking of Class A? ...and, finally, can you give me advice on some textbooks/articles treating such circuit blocks? \$\endgroup\$
    – barrow
    Jul 26, 2021 at 8:05
  • \$\begingroup\$ Kevin is talking about a very different circuit configuration that is DC coupled internally. No, I can't recommend any books or articles. This is an unusual circuit, and the best source of information is probably the book in which you found it. \$\endgroup\$
    – Dave Tweed
    Jul 26, 2021 at 10:55
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Might be easier to start by understanding this circuit's purpose, then how it achieves that...

The major voltage loss preventing rail to rail operation in the output stage is Vbe in T1, limiting the output voltage swing (given a normal driver stage) to Vcc - 0.7V. This is a significant waste of power at lower supply voltages, 12V or below. (T2 can be driven to saturation, Vce below 0.2V)

This circuit overcomes that by raising the voltage at A' to VCC + VCC/2 when the output is driven to the +ve supply rail, via C2, a "bootstrap" capacitor, as also seen in NMOS high side drivers. (Understand this circuit and you'll understand them too). By driving T1 base above Vcc, T1 can also be saturated, reducing wasted voltage.

T3 then acts similar to the phase splitter in a classic Class B, though its gain is 1 driving common emitter T2, and high driving emitter follower T1. This asymmetry makes up for T1 having gain 1 and T2 having high (common emitter) gain; ideally all three transistors would have the same Hfe.

(Note that in a classic phase splitter, the two gains of T3 would be nominally 1 and -1 thanks to both emitter and collector resistances being equal to R : this would apply here if A' was VCC, but does not apply with A' bootstrapped.

Output stage will be in class B or class AB, depending on the base voltages set by Vcc/2 across R1 and R2 for each output transistor; AB would require lower impedances in the whole of the bootstrap circuit.

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This configuration would normally be class A.

It is difficult achieve any other class using capacitative coupling to the output stage as the capacitors would charge up with the asymmetric drive required for class B.

An audio amplifier with very high quality that achieved fame for many years was published in 1969 by John Linsey-Hood in the Wireless World Magazine.

enter image description here

Linsey Hood Class A Audio Amplifier

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