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Reading this answer, I ran across the ggNMOS for ESD protection.
https://electronics.stackexchange.com/a/576935/166672

Reading on the web a little, it seems that this is only used inside of an IC, not at the PCB level. However I do not see any references as to why this might be. According to the Wikipedia article on ggNMOS when connecting the gate to the source and ground, "The drain of the ggNMOS is connected to the I/O pad under protection. A parasitic NPN bipolar junction transistor (BJT) is thus formed with..." There is no mention of special structure/doping being used to create the parasitic BJT.

So my questions are:

  1. Can a ggNMOS be created discretely on a PCB?
  2. Would it's performance be much different than using diodes.

My inclination on #1 is no, simply because I don't see this structure out in the wild.
For #2 my LTSpice simulations so far are not working for this circuit structure, so no comparisons yet.

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  • \$\begingroup\$ I imagine the parasitics are too high and MOSFETs with the optimized geometry aren't produced. \$\endgroup\$
    – DKNguyen
    Jul 26 at 14:27
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Can a ggNMOS be created discretely on a PCB?

I don't think it can. I'm assuming that by "created discretely on a PCB" you mean, using a discrete N-channel MOSFET.

The N-channel MOSFETs that are used as ESD protection devices on an IC are always planar MOSFETs. Planar devices are "surface" devices, they work in the horizontal direction, the current flow left-right. Here's a side view of a planar MOSFET:

enter image description here

source

This is bascially the "standard MOSFET" that most of us are familiar with.

Note that from Source to substrate to Drain you pass from N-type to P-type and N-type again, in other words, an NPN structure. That's the parasitic NPN which we need for the ggNMOS's "snapback" behavior.

Practically all discrete MOSFETs however are vertical or trench devices which work in the vertical direction, the currents flow up-down. Here's a side view of vertical MOSFET:

enter image description here

source

Note how the planar device is symmetrical, source and drain basically look the same. That means that if you look at the way how a ggNMOS device works then the Emitter and the Collector of the parasitic NPN are also the same.

This is not the case for the vertical device. Here the drain and source look very different. This is usually done so that the drain can be optimized to cope with high voltages and also to make the MOSFET be able to carry large currents and have high power dissipation. Yes, vertical MOSFETs are usually Power MOSFETs and they're optimized for switching somewhat large currents.

The build of vertical MOSFETs is such that usually a parasitic NPN is present but since the doping profiles are different from a planar MOSFET, I doubt that the parasitic NPN would work in the same way as it would in a planar MOSFET. If you read the ggNMOS article on Wikipedia there are several conditions that need to be met for this device to work properly so it is likely that the ggNMOS behavior only exists in certain specific situations.

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  • \$\begingroup\$ You can get discrete lateral FETs, though. I think the 2N7000 is one, actually. \$\endgroup\$
    – Hearth
    Jul 26 at 15:29
  • \$\begingroup\$ @Hearth Could be, I have no idea. Even then, it might not work as a snapback device if not all conditions are met (for example the substrate resistance). \$\endgroup\$ Jul 26 at 15:32

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