# Decoupling capacitors

Many IC's I've seen suggest decoupling capacitors across Vdd to Vss - this is sensible.

However some IC's for example the dsPIC33FJ128GP802 has THREE Vss pins and only two Vdd pins (AVdd and Vdd.) So would I put a decoupling capacitor on each Vdd pin, or from each Vdd pin to each Vss pin?

• I know saying look at the datasheet is frowned on as an answer, but I actually think this is a good case to bring it up. If a chip has any specific needs it will specify it in the datasheet. If you would have looked at the datasheet for this pic you would have found your answer. – Kellenjb Oct 29 '10 at 4:47
• I have actually seen a group who spent money on some pro-boards having not looked at the datasheet for any of the parts. When they hooked it up it didn't work. It ended up being that if they had looked at the datasheet they would have found that there was a layout consideration page that they needed to have followed. – Kellenjb Oct 29 '10 at 4:48

I believe the general rule is 1 cap per Vdd pin.

Are you using a ground plane? If so, don't bother attaching the caps to Vss pins. However, if you are using a ground bus instead, then yeah you should attach the cathode of the caps directly to Vss.

• I'm using a ground plane on my PCB's but I prototype on a breadboard. BTW, what is the cathode of a cap, I thought they were bipolar? – Thomas O Oct 28 '10 at 23:09
• I think it's being used as a name for the negative terminal of a device. Ceramic and tantalum caps (which are the only two kinds I'd consider for a decoupling cap) are bipolar, while electrolytics (which have an ESR too high to be effective for decoupling) are polarized. – Kevin Vermeer Oct 28 '10 at 23:56
• @reemrevnivek - Nonpolar tantalums? not common... – Connor Wolf Oct 29 '10 at 5:10
• Whoops! My bad. Deleted that brain fart to prevent the spread of misinformation, the rest of it is here: Cathode is being used as a name for the negative terminal of a device. Ceramic caps are bipolar, while tantalum caps are polarized. Note that the electrolytics are also polarized, but are a poor choice for decoupling due to their high ESR. – Kevin Vermeer Oct 29 '10 at 19:17
• "Are you using a ground plane? If so, don't bother attaching the caps to Vss pins." Well, technically you want the total loop inductance should be minimized. If you have ground/power planes, you want the traces from the capacitor to the plane to be as short as possible, and the traces from the plane to the IC pins to be as short as possible. But you also want the path through the plane to be short as well: planes are not perfect conductors, so there's still voltage variation on the planes at really high frequencies. – Jason S Mar 12 '12 at 20:10

In the case of that chip, yes, you would. They actually allocate quite a bit of space (pages 21 and 22 in the datasheet) to describing the capacitors required.

But, as a general rule, you do want 1 cap per Vdd pin. A ground plane negates the need for decoupling on Vss, if you don't have one you're going to have problems.

In the case of the dsPIC linked (and many other chips), each Vdd pin is adjacent to a Vss pin, so just put it right there. There are actually four Vdd pins, and four Vss pins, so they match up: 2xVdd (IO supply), 1xAVdd (ADC supply), and 1xVcap/Vddcore (internal regulator capacitance), along with 3xVss and 1xAVss.

• I'm using a dsPIC33FJ128GP802, which has the odd number of Vdd and Vss pins. The *804 has an even number. As a side note, why does Microchip do this? There must be some reason for the unequal numbers. – Thomas O Oct 29 '10 at 0:19
• Oh, I wouldn't count the Vddcore pin as a power pin as it is for the internal regulator. There is one Vdd, one AVss, two Vss and one AVss, why are there two grounds but only one Vdd? – Thomas O Oct 29 '10 at 0:25
• Why? You'd have to ask Microchip. I'd guess it's to reduce the pin count. Vddcore is definitely a power pin! See Sections 2.3 and 27.2 of the datasheet: The VCAP/VDDCORE pin must not be connected to VDD, and must have a capacitor between 4.7 μF and 10 μF, 16V connected to ground. The type can be ceramic or tantalum. – Kevin Vermeer Oct 29 '10 at 0:36
• What I mean is it doesn't sink or source current (except as for the capacitor.) – Thomas O Oct 29 '10 at 8:53

You overlooked $V_{CAP}/V_{DDCORE}$. If you take that in account you'll see that there's a $V_{SS}$ for every power pin.

I only wish Microchip would have placed the $V_{SS}$ of pin 8 and the $V_{DD}$ of pin 13 on adjacent pins, like it did for pins 19/20 and 27/28.

As explained in section 2.3 of the datasheet there's an internal voltage regulator for the core, which needs an output capacitor for stability. That's $V_{CAP}/V_{DDCORE}$. You connect a 4.7$\mu$F to 10$\mu$F between this pin and ground. That's all you need the pin for, the rest is internal.

Section 2.2 in the datasheet covers decoupling and shows this schematic:

Some designers will draw power rails in a corner of the schematic and place all decoupling capacitors there. Their excuse is that the decoupling in the schematic itself will clutter it and make it less clear. IMO that's a bad idea. Especially if someone else will create the PCB layout it's not clear where the capacitors belong physically. If you draw them like in the above schematic it's at least suggested which pins a capacitor belongs to and the PCB layout engineer will know that it has to be placed close to the pins.