I just started learning about MOSFETs and gate drivers and the like. I wanted to make an H-bridge operating at 320kHz that can later be modified through the use of faster FETs to get up to ~10MHz. I made this test gate driver for the MOSFETs: emitter follower driver

I expect the voltage at the gate w.r.t ground to flip between 20V and 0V depending on whether V2 is high or low.

However, this is not the case. The max voltage reached at the gate is 7.8V, and so, the highest I can set V1 is ~9V otherwise M1 is always on (Vgs threshold on M1 is -2 to -4).

What am I doing wrong? I have literally 1 day's worth of experience working with MOSFETs and gate drivers, so any advice, links to tutorials, and explanations are appreciated!


I changed the drain of the MOSFET to connect to an LC tank before going to ground: enter image description here

This is what I have setup on the breadboard right now I just forgot to update my schematic before I posted it!


Thanks for all the help so far, everyone. Unfortunately, the problem still persists. I changed the circuit a little based on suggestions about the supply voltage, Vgsmax and other considerations (please ignore the frequency and the specific MOSFET for M1. These were for testing, but the breadboard circuit still uses IRF4905 running at 320kHz):

enter image description here

I ran simulations to test this design. I also re-assembled the circuit on the breadboard, replaced all the BJTs and the M1 MOSFET. Still the same issue: The voltage at the collector of Q3 does not go above ~8.2-8.9V when Q3 is off (better than 7.8 at least!).

The scope readings: yelllow - Q3 collector purple - Q3 emitter cyan - M1 drain floating (LC tank disconnected)

With V1 at 9.3V: enter image description here

With V1 at 20V: enter image description here

As you can see, when Q3 is off (purple at 0V) the collector (yellow) does not go above ~8.1-8.7, even at 20V. But when Q3 is on, the circuit behaves more or less how I want it to (Q3 emitter bias controlling the voltage drop from V1 to prevent damaging the M1 gate)

  • \$\begingroup\$ Turning M1 on will short the power supply. So what is M1 source voltage when you do this? \$\endgroup\$
    – user16324
    Commented Jul 29, 2021 at 20:17
  • 1
    \$\begingroup\$ missing ground on V1 and missing load resistor between M1 drain and +20V \$\endgroup\$
    – Peter MP
    Commented Jul 29, 2021 at 20:18
  • \$\begingroup\$ @PeterMP added, thanks! \$\endgroup\$
    – lepton-7
    Commented Jul 29, 2021 at 20:28
  • \$\begingroup\$ @user287001 Hmmm that confuses me a little. Why does this happen and how do you suggest I fix this? I scoped the base of Q3 and the signal coming from V2 rises very fast but has a very slow fall. \$\endgroup\$
    – lepton-7
    Commented Jul 29, 2021 at 20:37
  • 1
    \$\begingroup\$ WARNING Your IRF4905 has a Vgs MAXIMUM of 20V. Operating it AT Vgs = 20V invites destruction. Operating it with an inductive load also invites decstruction from miller capacitance couple gate spikes. Add a reverse biased zener between g and s AND reduce the drive voltage. Vzener just above vrive max. \$\endgroup\$
    – Russell McMahon
    Commented Jul 30, 2021 at 10:22

3 Answers 3


In the comments you say

The max voltage does not exceed 7.8V regardless of how long Q3 is off.

but also that you have

...checked both Q2 and Q1. They are oriented on the breadboard how they are in the schematic.

However you don't say whether you checked Q3. Perhaps you didn't and it is reversed, or perhaps you are actually using the 'equivalent' P2N2222 and are not aware of its different pinout. So the analysis below may explain your symptoms.

In the 2N2222 datasheet an absolute maximum rating is given for Emitter−Base voltage (VEBO) of 5.0 V. Note the order - Emitter to Base, not Base to Emitter. That means they are talking about reverse bias, when it should be drawing no current. But they don't say what will happen if you exceed that value.

Silicon bipolar transistors usually have a reverse Base-Emitter breakdown voltage of 7~8 V, at which point the junction acts like a Zener diode. If you swap the Collector and Emitter in a circuit the transistor will still work, though with very low current gain. However the Base-Emitter 'Zener' is now across what should be the Collector-Base junction, which limits the 'Collector' voltage to 7~8 V + ~0.7 V.

The effective circuit looks like this, with the 2N2222 symbol showing functionality (not the actual Collector-Emitter orientation) and D1 representing the actual Base-Emitter's 'Zener'.

enter image description here

You might try to test this in LTspice by simply switching the Emitter and Collector of Q3 - then conclude that I am wrong because no such effect occurs. But the simulator is fooling you. The Emitter-Base breakdown characteristics are not included in LTspice's model of the 2N2222! (nor, as far as I know, any of its other bipolar transistor models).

This doesn't just affect circuits like yours when a transistor is connected wrongly. Even the ubiquitous BJT multivibrator circuit simulates wrong when the supply voltage exceeds ~8 V, because the timing capacitors drive sufficiently negative to reach the Emitter-Base breakdown voltage.


I see nothing to prevent M1 gate voltage from rising to 19.3V, but it can never reach 20V (or 0V) due to the base-emitter difference of 0.7V in Q1 and Q2. Other than that, in principle there's no load connected to Q1 and Q2 emitters to constrain that voltage, except the slightly capacitive gate.

In your simulation, you should indeed see M1's gate potential swing to those extremes, but on your breadboard (assuming nothing's broken) that may not be the case.

I see a huge load in L1 (and, initially, C1), connected directly across the supply when M1 is on, and I propose that this voltage source is unable to maintain 20V under such a load.

If this is the case, then supply voltage will diminish to the point where M1's gate-source potential difference is barely sufficient to turn on M1, and the supply and gate voltages will settle at some equilibrium. Under these conditions, the reason for your Q1+Q2 gate driver's inability to provide 20V would be that it no longer has a 20V supply.

  • \$\begingroup\$ Even when I leave the drain of M1 floating, I still see only a max of 7.8V on the M1 gate, even if my supply (V1) is at 10 or 15V. Any idea what else could be going on? \$\endgroup\$
    – lepton-7
    Commented Jul 30, 2021 at 22:43

It sounds as though you MAY be seeing reverse breakdown of Q10 be junction - they act as a zener at some voltage.

If so this suggests that Q2 is dead or not an NPN as intended. Check type and try another one. Pinout is usually CBE - check what yours is and that you have it correctly connected.

Starting with a not too high power RESISTOR load will allow you to eliminate power supply issues. But, reverse b-e breakdown sounds likely


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