How can I program flash using Vitis?

Question

I'm little new to Vitis and vivado. I have used ISE tools mostly for spartan 6 and it is steep learning curve for new tools.

I used iMPACT before with ISE to program flash using JTAG. Now with Vivado and vitis things are become more confusing for me.

What is real difference if I program flash using vivado and vitis ? I dont really get it. I know vitis has BSP bitstream and Vivado is just a hardware bitstream. When I use vitis "program flash" option then I can program the flash successfully but, after power cycle FPGA doesn't load config from the flash sit idle. I'm using CMOD S7 XCS725 and 2020.2 version.

Answer 1

So I finally figured it out. I positing it here for anyone who struggling with this. Vitis is not a great tool to do flash programming.

1. Create a block design with Microblaze (guide on how to do this here: https://reference.digilentinc.com/programmable-logic/guides/getting-started-with-ipi)
2. Add in the QSPI flash IP from the Board tab to the block design (usually 50 MHz clock to the external SPI clock on the AXI Quad SPI IP). Confirm that the IP confirmation on the AXI Quad IP is set to SPI Quad mode and the Slave Device is set to Macronix (presuming you have a rev B of the Cmod S7).
3. Finish generating the block design, create the HDL wrapper, and generate the bitstream (or only go through implementation).
4. Open the implemented design, so you can then go Project settings.
5. In the Project settings in the Bitstream section, set it so that the .bin file is created, go into the additional bitstream settings, set the Bitstream compression to True, set the configuration rate from 3 MHz to 33 MHz, and under Configuration Modes choose Master SPI x4. Click Ok and save the design.
6. Generate the bitsteam and export the .xsa and open Vitis.
7. Create a normal C application project (not SREC) and build the project. This will generate a .elf file.
8. Go back into Vivado, add that newly generated .elf file as a design source to the project and save (you'll probably be asked to save a new .xdc).
9. Right click on the Microblaze IP and associate that .elf under the Design sources (as opposed to simulation sources). Regenerate the bitstream.
10. Open up the hardware manager, click Add Configuration Memory Device (Macronix part number MX25L3233F for Cmod S7-25 Rev B), and program it with the .bin file.

You'll need to power cycle the board (I just unplugged and then replugged the S7 via USB) but the flash memory Microblaze program should be loaded and running.

Answer 2

As long you want to program the flash for a "normal" FPGA (no ARM SoC or other soft-cpus) the procedure is simple and it is indifferent if you do so using vitis or vivado directly. But just to be precise note that the BSP (Board Support Package) you mention is not a configuration bitstream.

To program the flash using vivado you can follow the procedure defined in ug908 at chapter 6. In short you will have to:

1. Define the memory device (in your case Macronix MX25L3233F according to the manual): tools>add configuration memory device.
2. generate a configuration file with the bitstream (the bitstream has format .bit, the flash conf file either .mcs or .bit), and then flash it on the device: tools>generate memory configuration file
3. Flash it on the device.

I would also suggest to take note of the commands being executed on the "Tcl console" window; you can write them down in a TCL script to script the whole procedure (and maybe put everything in a Make script).