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Background

I'm relatively new to electronics and playing around with a 555 timer.

I found that for astable operation, all sources I've seen recommends the following design (with different resistor and capacitor values to adjust timing):

Schematic

I wanted to make the output waveform symmetrical, meaning that it should be high and low for the same amount of time.

With that design, however, the time to charge vs discharge the capacitor will differ. I know that I can adjust this by changing the ratio of the two resistors, but if I use a small resistor as the upper one, it will draw more current in the discharge phase.

At that point, another design came to my mind.

My idea

My idea is to simply connect the capacitor to the output of the 555 through a resistor and charge or discharge it that way:

Schematic

As far as I see from that simulation, it works fine and generates a perfectly symmetrical square wave.

The question

  • Would this design work?
  • If so, why isn't it widespread and why is the former one "preferred" by tutorials, data sheets and other sources (I couldn't find my version anywhere)?
  • If it wouldn't, what issues would it have? Why would it be impossible/impractical/dangerous/problematic to use?
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4 Answers 4

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It's only going to be symmetrical if the output can swing symmetrically from rail to rail. For the old NE555 that certainly isn't the case:

Images source

You can see that for a few mA of output current, as would be the case with the output charging/discharging the capacitor trough 1K, the drop on the high level signal is much greater (~1.4V) then on the low level (~0.03V). So it's not going to be symmetrical at all.

Worse still, since the 555 oscillates between 1/3rd and 2/3rd VCC, the 1.4V drop on the high level makes it come dangerously close to not being high enough to trigger the threshold level. Connect something else on the output that draws some current, lower temperature, a poorer part, etc. and it won't work at all (for 5V VCC).

Some modern CMOS versions of the 555 may be better, but these didn't exist back in the day when all these 555 circuits were "invented", so that's probably why nearly all the schematics one finds use the discharge pin.

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Back in the 70's, so many people independently discovered/developed this circuit that when National Semiconductor introduced their CMOS version of the 555, they put the circuit in the datasheet.

Page 16, Figure 17: https://www.ti.com/lit/ds/symlink/lmc555.pdf

So ... Yes, it will work. As above, it is more predictable with a CMOS 555, compared to a bipolar 555.

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This layout gains in simplicity but on the bipolar based 555 (LM|UA|NE)555 the output is not symmetrical, so you don't get a even 50% duty cycle

Also you don't get the supply voltage immunity that the reccommended circuit gives. (so with an unregulated supply you don't get the claimed frequency stability).

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If you need exactly 50% then an f/2 FF will give you this. Then use any Schmitt trigger gate for an Astable clock. Then buffer as need for load.

You may find the Astable CMOS inverter or alone is close enough to 50% and is far better than any 555 so you may not need a /2 FF. Then you can change f with variable R and duty cycle with input bias R to 0 or Vdd.

Your modification is well known to work for CMOS but for TTL, push-pull driver, you need a pullup R to compensate for Voh drop and load current to compensate for Vol rise.

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    \$\begingroup\$ Presumably, "FF" is a flipflop wired to give a divide-by-two function. \$\endgroup\$
    – Simon B
    Aug 2, 2021 at 8:07

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