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I want my MOSFET to be initially "off" by default.

enter image description here

I can’t decide whether to place the pull resistor on M1 or M2 (pull up at M1 and pull down at M2). My typical instinct would tell to place it anywhere (with a very small biased to placing it at M2) but i would to make an informed decision. So I need your help with arguments if should I place a pull resistor on M1 or at M2.

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  • \$\begingroup\$ Add a 10k or 100k pull up resistor between the gate of M1 and your power rail (V1). \$\endgroup\$ Aug 1, 2021 at 16:31
  • \$\begingroup\$ Pls Define what drive signals you propose after power up. A small Cap across R3 greater than Coss of M2 may be all you need to guarantee no output V on R1 \$\endgroup\$ Aug 1, 2021 at 16:32
  • \$\begingroup\$ @TonyStewartEE75 M2 will be driven by a 3.3v signal from a mCu's GPIO with about 5mA of drive current. \$\endgroup\$
    – DrakeJest
    Aug 1, 2021 at 16:46
  • \$\begingroup\$ GPIO’s have an ouput impedance of ~25 to 75 ohms depending on logic family. Not 5mA limited’. Ron= Vol/I \$\endgroup\$ Aug 1, 2021 at 16:57

2 Answers 2

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If M2 is deactivated (and that state depends on the voltage source you have in your schematic) then M2's drain is high and Q2's emitter is high and this means that M1 is either "off" or as close to being off as it can be given the limitations imposed by the emitter follower push-pull stage.

If in fact you want it to default to having M1 inactive when there is no input connected (i.e. the input is floating), then you should use a pull-down on M2's gate to 0 volts.

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  • \$\begingroup\$ V2 is suppose to represent a microcontroller GPIO (3.3v), and since the M1s load is a LED strip. I do not want during powerup the LED would flicker momentarily as the mCU boots up. So it is best placing it at M2>? would placing it at both M1 and M2 yield any significant advantages? \$\endgroup\$
    – DrakeJest
    Aug 1, 2021 at 15:57
  • \$\begingroup\$ A pull-down resistor on M2's gate is definitely the right approach. M1 has a pull-up resistor (via Q2) in R3. However, given what you have disclosed about the load, I'd be tempted to get rid of both BJTs and connect M2's drain node directly to M1's gate node. Obviously leave R3 connected to M2's drain. \$\endgroup\$
    – Andy aka
    Aug 1, 2021 at 17:34
  • \$\begingroup\$ . . . the simulation looks all good, my target PWM frequency are all reached i had to reduce R3 to achieve my target frequency. Adding the push-pull just means i loose less power on m2 as i can raise R3 to much higher resistance. I guess the BJTs are really unnecessary. What situations where those BJTs are necessary? \$\endgroup\$
    – DrakeJest
    Aug 1, 2021 at 18:02
  • \$\begingroup\$ Example: the BJTs would be necessary when the load you are driving is many amps and you want to turn on M1 as quickly as possible to avoid switching losses. \$\endgroup\$
    – Andy aka
    Aug 1, 2021 at 18:14
  • \$\begingroup\$ I can see what you mean with the push-pull circuit im getting 0.1us rise and 0.4us fall, with out the push-pull im getting 0.1us rise and 1us fall on the load. Im expecting 8A on my leds strips since they are very long. I guess i still do want the BJTs for thermal management since they are not that expensive, \$\endgroup\$
    – DrakeJest
    Aug 1, 2021 at 18:42
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DMP3013. Has a a high Vgs(th) of 3V so 0.7V Vbe on Q2 is enough to shut it off . Putting a small cap across R3 > Coss of M1 will force the base to supply voltage to start at 0V driving the Vgs of M1 output driver at 0.7V keeping it off until you input of 0V is stabilized by it’s pullup on drain (5000).

This may reduce slew rate of PWM but not significantly as the 2N7002 Coss is 25 pF max so 100 pF across R3 results in T= 500 ns. You can reduce C to performance desired down to 20 pF for 100 ns.

If your input is floating on power up before defined as a driver then 100 pF across M2’s gate will accomplish the same. Ciss input capacitance is 50 pF worst case.

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  • \$\begingroup\$ Im soryy but what do you mean by Coss? Using a capacitor instead of a pull resistor is new to me. \$\endgroup\$
    – DrakeJest
    Aug 1, 2021 at 16:48
  • \$\begingroup\$ Coss is on datasheet for ouput capacitance of FET. If you enable driver on power up fast enough, C will give you a low input on M2 Vgs to protect you for a long time as driver impedance and gate impedance is high initially. Thus 100 pF * 10Megohm = 1000 us. Use bigger cap if necessary Ciss is also given for 2N 7002 \$\endgroup\$ Aug 1, 2021 at 16:50
  • \$\begingroup\$ What are the advantages of doing it this compared to regular pull resistor? \$\endgroup\$
    – DrakeJest
    Aug 1, 2021 at 17:09

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