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I have designed following circuit of a zero-crossing detector, which is supposed to amplify small sine wave signal and convert it to (digital) square wave. It uses one single supply op amp for amplification and one comparator for converting to logic levels.

schematic in LTSpice

Initially, I started simulating this circuit with 1mV p-p input signal with no phase shift. In this case it works fine, output of the comparator is a nice square wave with 50% duty cycle.

Then I introduced a phase shift of 90 deg, via the Phi parameter of the V2 supply. Immediately, I noticed some unexpected behavior. The duty cycle of the square wave increased to about 51.8% - that means almost 4% difference between length of positive and negative pulse. After some investigation, I found that the amplified sine wave shifted a bit towards zero and is not perfecly centered around Vbias anymore. It shifted about 0.3 mV (6% of amplitude).

Any idea, why introducing a phase shift at the input caused voltage shift of the amplified sine wave?

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2 Answers 2

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You have a time constant between C2 and R6 of 100ms. You can expect any transient effects to mostly be gone after 5 or 10 time constants.

Try gathering your data after 1 second for whatever time interval you are using (presumably short since you have a 10kHz signal).

There's an interaction between the waveform you get at the beginning and the DC operating point which is found by the simulator before simulation starts.

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  • \$\begingroup\$ In other words, if you added a 90 degree delay at the sinewave's peak, it was positive for 3/4 cycle instead of 1/2 cycle, and that asymmetry upset the DC conditions on C2 (as well as C1) \$\endgroup\$
    – user16324
    Aug 1, 2021 at 22:46
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Prior to beginning the iterative process of time-stepping and calculating the system state at each step, the simulator performs a DC operating point analysis, to establish all initial conditions.

To do this, it uses the value of all voltage sources at time t=0 to determine their initial DC value. With no phase shift in your sinusoidal sources, each source has an initial value of Asin(0) which is 0V. However, by specifying a phase shift of Φ = 90°, you cause a sinusoidal voltage source at time t = 0s to become Asin(ωt + Φ) which equals A.

This initial offset will influence the initial charge of all capacitors in the system, before time-stepping commences, and you will see this manifested as a the shift in conditions you witnessed.

However, this lasts only as long as it takes the system to re-establish the true, long-term DC operating point after time-stepping analysis begins. This is dependent upon how quickly the capacitors' charges converge to their long-term values, which will be related to their time constant (in combination with peripheral impedances).

If you run the simulation for longer, you should see the duty cycle eventually return to 50%.

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