Tinkering around, I found out that if I connect a capacitor to the load resistor, i.e. if I pass the output through a RC circuit, the voltage retains it original value, and the frequency too, if the capacitance of this capacitor is the same as the previous ones in the circuit. However, the square wave's upper edges are somewhat rounded, and somehow touch the V_init. Can someone give a possible explanation to this, as to how to apply Thevenin's theorem here, if it's actually feasible here, and how does this configuration relate to the initial circuit without a load resistor connected to the output?
This is a common design fault. Each stage is Common Emitter or active “pull” only , while the “push” is the collector R.
When an AC coupled Load is connected, that load R MUST be greater than Rc to avoid overloading the collector R pullup as although the series C is a HPF, the collector sees it as a partial LPF additional load.