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I was wondering if it is possible to replace the tri-state buffer with a transistor and a diode as shown in the image.

In this case a zero will be the same as high impedance. I don't understand why we should make the current flow in the other direction when we output a zero, we could just leave it at zero volts, and with the help of the diode we can prevent the current from going the other way and messing up the data.

This way it will be - as I understand - not connected to the circuit.

As long as we enable just one register, there shouldn't be any problems. This way we could save a lot of transistors and propagation delay.

enter image description here

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There are some problems with your design.

enter image description here

Figure 1. The problem.

  1. The big one is that once the base is pulled high that current will flow through the base and diode and drive the bus line high regardless of the state of Q.
  2. If 1 wasn't enough of a problem your transistors are arranged as voltage followers. When Enable goes high the emitter voltage will be Vb - 0.6 V approximately. Then subtract the diode voltage drop and you've got Vb - 1.2 V. That may be enough to fail the logic high requirements of the devices being driven.
  3. When all the Enable inputs turn off there is no pull-down on the bus line. A beginner's mistake is to assume that a disconnected input will fall to zero volts. There is no reason why they should and are just as likely to float positive or stay where they are. CMOS inputs cannot be left in a floating state.
  4. Even adding a pull-down resistor on the bus may not be good enough as it will be discharging any capacitance on the bus. Driving the line to GND is far more effective and much faster and, therefore, allowing higher bus speeds.

But how about this solution here:

enter image description here

Figure 2. Attempting to prevent Enable feeding through to the bus.

It is most likely that the devices on the bus have CMOS inputs which have extremely high input impedance. That means that even a current limited solution will still pull the bus high.

And I didn't quite understand what you meant by number 4. I have seen someone on YouTube using a pull-down resistor on the bus and he got away with it!

The bus will have some capacitance due to proximity of traces and the capacitance of the CMOS inputs it is feeding. When the bus lines are driven high or low you have to charge or discharge this capacitance. You can discharge with a pull-down resistor but that will take a little time (τ = RC) and that will introduce a small delay. It's much better to drive the line high and low.

You don't want to design to "get away" with something. If you do you won't be sure how close to failing your circuit is and while it may work for this device it may not for the next due to variations in chips, etc. Watching YouTube is not a substitute for study, reading books, datasheets and technical articles and for proper design with calculations.

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  • \$\begingroup\$ I want to apologize in advance for my lack of knowledge in this area. I am a total beginner. But how about this solution here: i.stack.imgur.com/NwInq.jpg \$\endgroup\$
    – Ctvpd
    Aug 4 '21 at 11:36
  • \$\begingroup\$ This is an and gate between the two. this will solve 1 and 2 - I think-. and the resistor will limit the current from the base. \$\endgroup\$
    – Ctvpd
    Aug 4 '21 at 11:38
  • \$\begingroup\$ And I didn't quite understand what you meant by number 4. I have seen someone on youtube using a pull-down resistor on the bus and he got away with it! \$\endgroup\$
    – Ctvpd
    Aug 4 '21 at 11:40
  • \$\begingroup\$ See the update. \$\endgroup\$
    – Transistor
    Aug 4 '21 at 11:57
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will not work: when enable is high current will flow through the base emitter junction driving the bus high.

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  • \$\begingroup\$ Yes, quite right and better answer than mine was. \$\endgroup\$
    – Justme
    Aug 4 '21 at 10:39
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There is no reason to do this, but a discrete BJT tri-state bus would be low impedance for the active state and high impedance for the inactive state.

However, real TTL tri-states must adhere to voltage margin and current specs.

My simple model and a real TTL 3-state gate

enter image description here

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