I have a FlexPCB with 4 layers and total thickness of about 200 µm. The second layer is a ground plane that is solid copper over the entire FlexPCB. To increase flexibility of the FlexPCB, I want to hatch it in the bending areas with copper (e.g. hatch width 0.2 mm and gap width of 0.3 mm). The hatch area has a width of about 2 mm and the PCB height is about 10 mm. The signals (green, layer 3) going over the hatched ground plane (blue, layer 2) have typically a trace width of 80 µm, trace spacing of 80 µm and a rise time of 6ns or slower.

I believe that hatching increases impedance and crosstalk in a totally negligible way. Does anybody have a rule of thumb or can explain an easy setup for a simulation (I have no experience for such a simulation)? https://electronics.stackexchange.com/a/568355/276690 speaks about an increase of 1.2 of the impedance?

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  • \$\begingroup\$ What frequency and rise/fall times are you running the signals at? \$\endgroup\$ Aug 4, 2021 at 18:13
  • \$\begingroup\$ the mentioned rise time of 6 ns is a signal with a frequency of 6 MHz \$\endgroup\$
    – mpa
    Aug 4, 2021 at 18:21
  • \$\begingroup\$ It concerns me how many copper pour areas you have on the green layer, disconnected from everything. You may want vias between them and the ground plane. Or delete for flexibility. \$\endgroup\$
    – user16324
    Aug 4, 2021 at 19:50
  • \$\begingroup\$ you are right, disconnected copper islands are a really bad idea. However, vias are not visible in the image and some of the islands will be removed in the final design, so it will look nicer :-) However, because we 'abuse' copper fill also for mechanical stability in some places (no, stiffener is not an option), we will have some copper fills in this FlexPCB that I would never put in a 'regular' PCB design. \$\endgroup\$
    – mpa
    Aug 4, 2021 at 21:03
  • \$\begingroup\$ Personally I always check that the current return paths (GND&PWR) are not interrupted - you could widen some signals rather than having isolated islands if you need the copper for stiffnes. You'll have more copper (because you need less isolation). Maybe your hatching should be turned 45° - I'ld think that creates less mechanical strain on your signal lines. \$\endgroup\$
    – le_top
    Aug 4, 2021 at 22:59

2 Answers 2


I believe that hatching increases impedance and crosstalk in a totally negligible way. Does anybody have a rule of thumb or can explain an easy setup for a simulation (I have no experience for such a simulation)?

Hatching decreases capacitance for signals that are running in an adjacent layer to the hatch. Why? Because there is less copper. It also somewhat increases inductance on the hatched plane because there is less copper. Without going into a lot of calculation, if you remove 70% of a reference ground plane from the underside of a trace, you are also decreasing the capacitance to that plane by ~70% (there are fringing fields that would change area vs capacitance.

If the signals are not high speed and not transmission lines then it probably wouldn't be a big deal to change it to hatched, you may have slightly more electric field lines that go through the hatches, but I'd imagine that the cross capacitance between two traces would be similar, however, a continuous ground plane would be better than a hatched one.

If the hatched layer is a reference plane for a transmission line , the decrease in capacitance and increase in inductance will change the characteristics of the transmission line. (And at that point it will be really difficult to find the impedance, because you would need to come up with a new set of equations that approximate a hatched plane for a microstrip, in addition the hatched layer has different area of copper/capacitance between trace and hatched plane)

If I were designing this flat flex cable, I would not use a hatched plane in a high speed design. There would also need to be another good reason to use a hatched plane (thermal or for bending) because the hatched plane is worse for most designs (reduced capacitance to ground/ref plane and reduced inductance) I would recommend not using it if at all possible.

  • \$\begingroup\$ makes sense, thanks. In my case, easier bending is the reason for hatching. I totally see your argument for transmission lines. I considered 6 MHz signals with a rise time=6ns and trace length=35mm not as transmission lines though. Also considering the hatch area is only 2mm long for the signals, I believe it should not be an issue. Though I'm not sure, that's why I asked. \$\endgroup\$
    – mpa
    Aug 4, 2021 at 20:00
  • \$\begingroup\$ One could run through the calculations which would be time consuming (I don't have that kind of time), a hatched plane will have a different impedance. For example: Lets say I have a 5mil spacing between planes with an Er of 4.6, I want 50Ω trace, which would be about 8mils. If I hatch the plane (by 50%) my capacitance per inch goes from 2.8pf/in to 1.4pf/in so that means it also changes the impedance to higher than 70Ω (depends on the orientation and where the trace runs across the hatch). \$\endgroup\$
    – Voltage Spike
    Aug 4, 2021 at 20:08
  • \$\begingroup\$ yeah, the change in impedance is certainly there, even if the hatch is just 2 mm long for the signal. Just wondering, which simulation software would you use? \$\endgroup\$
    – mpa
    Aug 5, 2021 at 6:16
  • \$\begingroup\$ I usually just use hand calcs or altium or Saturn PCB tools for trace design, I try and keep it simple so I don't have to use an FEA which would be too time consuming for my designs (I tried a few, and they took up more time than they are worth) \$\endgroup\$
    – Voltage Spike
    Aug 5, 2021 at 14:19
  • \$\begingroup\$ Structures like this hatched ground plane are unlikely to cause signal integrity problems for 'relatively slow' rise/fall times, however, EMI can be much more of an issue. If you have to pass EMI, I would think long and hard before doing something like this. The fields will spread, a lot. Perhaps the exercise here would be to find the best mechanical pattern that allows for flexibility while keeping copper coverage to a maximum? \$\endgroup\$ Sep 4, 2023 at 11:48

I took my question as an excuse to start learning CST Studio. With a pulse of 1 V and rise/hold/fall-time of 4 ns, the voltage on the victim line increases from 0.002 V to 0.015V if there is a gap of 4 mm in the ground plane. If there is a bridge right below the aggressor trace of 2*trace_width, the voltage in the victim is basically the same as if there was a continuous ground plane. If I configure this simulation correctly, signal integrity and crosstalk is not an issue if the ground plane is hatched for better bending. EMC is still open though.

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  • 1
    \$\begingroup\$ Note also the change in leading edge (rise time and overshoot). For a few mm of length, at ~ns edge rate, it's inconsequential. Things get much more interesting for edge rates approaching the length of the trace in question; even further still the size of the hatching pattern, in which case you get a band-stop response: it's an electromagnetic bandgap (EBG). \$\endgroup\$ Sep 4, 2023 at 13:58
  • \$\begingroup\$ I'm just reading the first time about EBG, interesting, thanks! As you mentioned, the use case here is luckily far away from a EBG. I should also mention for others, that the form of the signal on the victim line depends on the terminations. Next I need to learn whether hatching might create an issue with EMC/radiated emissions? Do you have an idea how I could check this with CST? \$\endgroup\$
    – mpa
    Sep 4, 2023 at 16:59
  • \$\begingroup\$ EMC is about two things: radiation directly off the trace itself (trace as antenna), and common mode (voltage drop in ground / surrounding material, which further acts as antenna). Consider a figure like this: i.stack.imgur.com/0tzqy.png \$\endgroup\$ Sep 4, 2023 at 17:14
  • \$\begingroup\$ A better version with more details -- i.stack.imgur.com/BpgNa.png (hm, I suppose I should also label those "perspective" "end" and "side" views too) \$\endgroup\$ Sep 4, 2023 at 17:33

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