I was trying to simulate (In LTSPICE) buffer for ADC 08200 that would have 1Meg input impedance it is about to be used with standart oscilloscope probes. But I am having problem with bandwidth limiting. So far I have tried OPA354 and LMH6702 and both suffer from this pitfall.

What is correct way to make high impedance ADC buffer?

So far I have came to this as circuit with best result (as far as bandwidth goes, but it's having very high attenuation). I am simulating 1:10 probe with 9Meg resistor.

My simulation


I have redesigned the circuit but I am having weird problem with simulation and I think that circuit should work but I am getting very small negative voltage out of OPAMP even thought it's supplied by positive rail only.

This is my schematic now: Weird error

Blue trace is output of OPA355 and green trace is non-inverting input.

R11 and R12 are used for offset adjustment. C5 is AC coupling capacitor (if used).

//Edit3: Fixed model of OPA355 now, but I am having different problem.. on certain frequency it seems that there is some parasitic capacitance charging, but I have no clue where .. Same trace is for non-inverting input, output and inverting input...

Parasitic capacitance?

  • 5
    \$\begingroup\$ Messy schematic is messy. \$\endgroup\$ Feb 15, 2013 at 22:18
  • 1
    \$\begingroup\$ The 1MEG input impedance is due to the opamp's input gate, NOT a resistor. Get rid of those. The probe doesn't have the high impedance either, again it's the opamp. As Anindo answered, you should hook the probe input directly to the opamp input. The opamp input has a input capacitance associated with it so if you have a large resistance in front of it (you do), it'll create a low-pass filter, which is why your square wave looks like a sin wave. An ideal probe would have 0 resistance and 0 capacitance. \$\endgroup\$ Feb 15, 2013 at 23:37
  • 1
    \$\begingroup\$ On your edit, did you try a dc sweep of a simple circuit with the OPA355 to be sure the model works correctly in LTSpice? Since it's a TI part, their model is probably tested in PSpice or Spice3, not LTSpice. The most common errors would be subcircuit i/o's not connected to the correct pins of the op-amp symbol, or Spice3 syntax in the model that doesn't translate correctly to LTSpice. \$\endgroup\$
    – The Photon
    Feb 16, 2013 at 17:50
  • \$\begingroup\$ You are right pin order was different from other models.. now it works, though I have other issues with it. \$\endgroup\$ Feb 16, 2013 at 18:00

4 Answers 4


An approach to high input impedance buffering with an op-amp is to create a non-inverting unity gain buffer, using a very high input impedance op-amp, such as the Intersil CA3140 (1.5 Tera Ohms), or the Texas Instruments OPA2107 (10 Tera Ohms), both of which have a Gain Bandwidth Product of 4.5 MHz.

Unity gain buffer (From Wikipedia)

In a non-inverting unity gain buffer configuration, the input impedance of the buffer is the input impedance of the op-amp itself, and resistance noise is minimized / none.

One other factor, though, is the input capacitance of these op-amps, 4 pF in the case of both these example op-amps. This capacitance itself would load the incoming signal, if the signal frequency is very high.

As the question does not state the desired bandwidth, the suitability and capacitance impact of the suggested op-amps can not be verified. Using a spice model for one of these in the simulation may help in this.

Based on subsequent comments, for a 100 MHz unity gain bandwidth desired, the Texas Instruments OPA355 or OPA356 would work, with their GBW of 200 MHz, and input impedance of 10 TeraOhms coupled with capacitance of just 1.5 pF.

  • \$\begingroup\$ Thank you, I am considering maximum frequency 100MHz.. Thank you for examples of suitable OPAMPs, could you point me to some higher frequency ones? Also ADC datasheet states that I should use OPAMP that could source soumething around 60mA. \$\endgroup\$ Feb 15, 2013 at 20:58
  • \$\begingroup\$ See edit to answer. Also, input resistance of ADC08200 is > 1 MΩ, and absolute maximum current into any pin is 25 mA, so where is the 60 mA figure coming from? This ADC will not draw more than 4 microAmperes on the input pin, worst case. \$\endgroup\$ Feb 15, 2013 at 21:45
  • \$\begingroup\$ @AnindoGhosh: Many ADCs add or remove a significant amount of charge to/from their input when they start to take a reading. A very "stiff" op amp may be able to counteract this; I expect that a 60mA recommendation would come not from an expectation that the ADC input would actually need to supply 60mA, but rather an expectation that an op amp which can sink/source 60mA would be more likely to quickly sink or source enough charge to counteract the switched charge inside the ADC. \$\endgroup\$
    – supercat
    Feb 15, 2013 at 22:45
  • \$\begingroup\$ @supercat I was asking for a source for that 60 mA number, not a reason it could be valid (which it could be, if the ADC input capacitance were high enough). \$\endgroup\$ Feb 16, 2013 at 4:25
  • \$\begingroup\$ @AnindoGhosh: It was in original National datasheet for ADC08100 (not 200) as suggestion.. \$\endgroup\$ Feb 16, 2013 at 9:45

The problem with your simulation is possibly not the bandwidth of your input amplifier; it is the model of your 10:1 oscilloscope probe.

You are modelling it as a 9 Megohm resistor; feeding a (nominally) 1 megohm input stage.

A typical oscilloscope input stage is actually 1 megohm in parallel with 20pf (capacitance varies according to scope model) and so the probe must take this into account.

It does so with a small capacitance in parallel with the 9Megohm resistor. To cope with 20pf input capacitance, the parallel capacitance should be 1/9 of this value, or around 2.22pf. Such a capacitance is difficult to generate; so a variable capacitor is used, and you have probably undergone the ritual of calibrating a new (or borrowed!) scope probe before use.

The waveform you show looks like a very badly calibrated scope probe, so you need to do the same with your SPICE model, before worrying about the opamp. Try 2pf across the 9megohm resistor, adjust the value for maximum flatness of a square wave. (Or compute the value to use, from the details of the opamp model). If the result still isn't good enough, then try Anindo's suggestions.

EDIT : it is difficult to read your schematic : if the 1000k resistor is really in series with the opamp input and the capacitor C3 is really shorted out, there are other problems to fix first.

  • \$\begingroup\$ C3 was shorted intentionally, it is there if I want to simulate AC vs. DC coupling. And about 1000k resistor.. yes it was really in series.. I was altering original TI buffer circuit for ADC08200. \$\endgroup\$ Feb 16, 2013 at 9:47
  • \$\begingroup\$ Looking at the revised schematic of 16 Feb : what the heck are R12/C6 doing? and what happens to the capacitance charging (LF response without them) \$\endgroup\$
    – user16324
    Feb 17, 2013 at 18:04
  • \$\begingroup\$ These are modeling compensationon BNC side of probe as described in schematic posted by Oli Glaser, if they are removed the situation is the same. \$\endgroup\$ Feb 17, 2013 at 19:16

Brian is right about the probe and the need for a parallel cap. Also, combined with the high input impedance, the tiny input capacitance of the opamp makes a big difference at high frequencies. The 2pF combines with the input resistor to form a low pass filter. I can't see from your schematic what exactly you are modelling, but I'll discuss both the probe and scope input itself.
If you want to model a probe more accurately, you will need something like that shown below from the linked pdf, with a 9MΩ and parallel trim cap on the probe side, then transmission line and compensation at the input side. You can then add this to the circuit shown below for a full simulation of both probe and input + buffer.


Having designed/built a couple of reasonably high speed (up to 500Msps) DSOs myself, I can say the front end can present just as many issues as the FPGA design, layout, etc. It's where many of these low end handheld scopes fall down (for example see Dave Jones review of the QDSO)

Assuming you have a good quality probe with a compensation circuit at the BNC end (probe design is an art in itself, the T-line is intentionally lossy - see The Secret World of Oscilloscope Probes for an excellent read) then the front end divider needs to allow for the op-amp buffers input capacitance.
Here is a "typical" scope input example circuit which divides by 2 and 20, that illustrates the difference between compensation/no compensation with just 2pF of input capacitance.

Circuit (C2 and C5 would usually be trimmer caps which are adjusted at calibration time)


AC Sweep Simulation up to 100MHz

Sim 1

Same simulation - capacitors removed. Bandwidth is less than 1MHz!

Sim 2


Hello guys I have managed to get something like this, it's complete preamplifier with simulation of probe as lossy transmission line.

Schematic of solution

Which has frequency response like this (measured at R8), it has -3dB cutoff just somewhere at 100MHz. Response

Which is actually quite neat for 200MSPS ADC I'm about to use.

Do you think that it could go better with this OPAMP? I'm just curious I think this will do.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.