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I am studying DMA block presented in IP catalog and figure out what the best choice is.

I started with AXI DMA and AXI CDMA blocks and found the following description of the difference:

AXI DMA is used with streaming devices to memory mapped devices or vice versa. AXI CDMA is used with memory mapped to memory mapped devices

I didnt understand these sentences,could someone explain what this mean? What is a difference?

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    \$\begingroup\$ which part is unclear? \$\endgroup\$
    – jsotola
    Aug 12, 2021 at 14:54
  • \$\begingroup\$ Did you read chapters 2 and 3 of the linked document? They describe the operation of the different DMAs. \$\endgroup\$
    – Adam Haun
    Aug 12, 2021 at 15:31
  • \$\begingroup\$ @jsotola What is a difference? I have read and it seems they are almost the same blocks, both are for high transmission (PS to PL). and CDMA is connection between two memory mapped block... is this only a difference between them? \$\endgroup\$
    – Franki Lee
    Aug 13, 2021 at 6:01
  • \$\begingroup\$ @AdamHaun I did. Sorry I am a beginner and probably dont know how to find a difference in such description. in these chapter, description of these block are given, signal, port...but it wasnt discussed what cases we should use the first block or second... \$\endgroup\$
    – Franki Lee
    Aug 13, 2021 at 6:04
  • \$\begingroup\$ @jsotola if I have a stream transmission, will be axi dma the best choice? \$\endgroup\$
    – Franki Lee
    Aug 19, 2021 at 6:28

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Going by the descriptions and block diagrams, it sounds like a streaming device would be one that produces or consumes a stream of bytes. A memory-mapped device connects to a memory bus. So a peripheral that stores incoming data in a memory-mapped register would need the CDMA, while a peripheral where the data comes directly out of a FIFO buffer would use the DMA.

If you tell us more about the system you're working on I might be able to help more.

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  • \$\begingroup\$ Thank you for taking your time! Briefly, I am working on SPI ( high speed, up to 50 MBits/s, which should be connected with CPU ( hardware) via DMA or DMA with FIFO ( CPU is connected with DDR-RAM ( Ping Pong Buffers for transmit and receive). \$\endgroup\$
    – Franki Lee
    Aug 16, 2021 at 5:44
  • \$\begingroup\$ In that case, it sounds like you would use the CDMA to read data out of a memory-mapped SPI register or the regular DMA to read data straight out of the FIFO. \$\endgroup\$
    – Adam Haun
    Aug 16, 2021 at 16:26
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    \$\begingroup\$ I have found another block - AXI Data mover. If i connect it with AXI FIFO Stream block ( command transfer parameters)I will get the DMA block, as I understood. This block gives me more freedom in implementation, isnt? \$\endgroup\$
    – Franki Lee
    Aug 17, 2021 at 5:40
  • \$\begingroup\$ if I have a stream transmission, will be sxi dma the best choice? \$\endgroup\$
    – Franki Lee
    Aug 19, 2021 at 6:27

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