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Here I have this portion of the circuit which I can't really understand what it is doing and I want to solve it, so I can understand it.

The inverting input is having a 2 signals and their peak is 5V. While on this inverting input we have this transistor with analog switch. The analog switch is being switched by a delay signal whose on-time is 50µs. This is the portion I am confused about. So I want tips/suggestions to how to understand this circuit and how to solve it, so I could understand why they used this transistor and switch part in this circuit. The value of capacitor is 100nF.

Opamp rail voltages are 10.6V and ground.

enter image description here

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  • \$\begingroup\$ Have you considered using a simulation tool? \$\endgroup\$
    – Andy aka
    Aug 12, 2021 at 15:24
  • \$\begingroup\$ @Haseeb Use a spice tool (like LT spice to simulate this) \$\endgroup\$
    – Voltage Spike
    Aug 12, 2021 at 15:39

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The function of the switch is to interrupt the resistive feedback to the amplifier, so that (due to the feedback capacitor C39) the output slew rate becomes slow.

That has the effect of sampling the sum of the input signals, and holding that sum value nearly constant for the OFF time of the analog switch.

As for the transistor Q6, it seems to clamp the amplifier input so that it cannot drop below about 4.7V; that's a mystery to me. Is the transistor base really held at constant voltage?

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  • \$\begingroup\$ Yes thats also what confusing me transistor is constantly being held at that voltage, so I keep asking this question why even bother it putting there when it is constantly ON. \$\endgroup\$ Aug 13, 2021 at 20:08
  • \$\begingroup\$ @HaseebZaib - Hi, You posted that text as an "answer", in the "Your Answer" box below. Please note that Stack Exchange is not like typical internet forums & only answers to the question at the top of the page should be written in that box. In this case, it was clear you were trying to reply to this answer, so I moved your post to become a comment here. You will see more site rules and etiquette explained in the tour and help center. Please use comments to reply to answers (if needed) & edit the question to add any updates. Do not use the "Your Answer" box, unless you are adding a final solution \$\endgroup\$
    – SamGibson
    Aug 13, 2021 at 20:24
  • \$\begingroup\$ @HaseebZaib The op amp, if it actually is operating, regulates the input pin at its 6V point, so clamping would presumably not occur in normal operation; that makes the operation of the transistor a load (current sink) and has the effect of making a logarithmic response. Ideal-diode in feedback is one way of making a logarithm amplifier. The resistor R46, though, dominates if output is high (and transistor shuts off) \$\endgroup\$
    – Whit3rd
    Aug 14, 2021 at 21:20

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