I'm currently messing with the ESP8266Audio Library. I uploaded a sketch to my ESP8266 that uses a HTTP stream of MP3 from the web and plays it using some MP3 decoder. So basically the loop looks like this:

  1. Read input from the web
  2. Decode next frame
  3. Get a sample
  4. Consume the sample

Now I wonder - the ESP8266 doesn't have several cores on it (as far as I know) - there's only one thread of execution. When the processor is busy reading from the TCP socket the next chunk of data, how is it that music is being played?

I'm asking this because I'm currently trying to use a 23LC1024 memory chip as RAM (This is a Microchip SPI RAM), and it's not going so well - the sound sounds broken, fragmented. My suspect is that it just takes time to the ESP to read and write data back and forth to the RAM chip. So I'm currently trying to understand what happens in each step to try to get a picture of the timings of the whole process..

  • 2
    \$\begingroup\$ It's explained right in the link you gave in the readme - besides the code author would be anyway better person to ask. \$\endgroup\$
    – Justme
    Aug 14, 2021 at 23:36
  • \$\begingroup\$ @Justme, can you be a little more specific? \$\endgroup\$
    – YoavKlein
    Aug 15, 2021 at 5:10

1 Answer 1


'only one thread of execution' - not quite. Whilst the esp8266 has only one processor core, you can have multiple threads of execution concurrently. I've not looked at the code you're referring to, but the 'usually' methods are:

  1. dma. This is a hardware peripheral that moves a block of data from ram to/from a peripheral (or ram). Your code tells the dma controller where the block of ram is and what peripheral. You tell the peripheral to talk to the dma controller. For example, the I2S peripheral for digital sound (not sure if the esp8266 has this, the esp32 does) when it needs another sample to send, it requests this from the dma controller (this is all done in hardware on the chip) and the dma controller grabs it from ram and gives it to the peripheral. Rinse and repeat. Once set up, the cpu does not need to intervene. The dma controller can interrupt when it is finished.

  2. Interrupts. An ISR is another thread of execution. You can have multiple ISRs and thus multiple threads of execution. Just that only one is executing at a given instant. You could set up a timer interrupt and the timer ISR reads a value from ram and outputs it.

Both these techniques will probably use what is called a 'pin-pong' buffer. This involves two buffers (or arrays or blocks of memory- however you like to refer to them). Whilst one buffer is being used to output the data, the other is being filled with the next. The idea is that you can fill the one buffer in the time it takes to output the other buffer. Once done, you swap the buffers - the one you just filled is being output and the one that was being used for output now gets loaded with the next load of audio samples. Rinse and repeat.

There other techniques as well, some are just a variation of what I've described.

Tasks like your WiFi are running in the background as another thread of execution. It most likely uses interrupts and dma to do its work.

With the esp8266 the software framework allows the use of FreeRtos - this manages multiple threads of execution. On the esp32 it manages the multiple cores as well.


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