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I was reading this application note from Omicron. Output Impedance for Stability Analysis

I was not able to understand how the output impedance is used to measure the phase margin of the DC-DC Control loop. Tried to understand, but not sure on how it is explained over there

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  • \$\begingroup\$ To be specific, are you referring to section 2.5 where they offer two figures Fig:6 and fig7 and no further explanation ? \$\endgroup\$
    – AJN
    Aug 17, 2021 at 15:37

3 Answers 3

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It is necessary to distinguish two measurement methods here even if both deal with output impedance measurements:

  1. the first one deals with the measurement of the output impedance in closed-loop conditions. This is called a non-invasive measurement because you determine \$Z_{out}\$ of a black box without knowing what is inside and keeping the converter in regulation without physically opening the loop. Then, considering the phase response of the output impedance in this mode, you are supposed to look at the group delay which measures the rate at which the phase changes versus frequency. Intuitively, you can see below for a second-order system how the phase changes with different quality factors:

enter image description here

The idea here is to find a way to determine the closed-loop quality factor \$Q\$. With the group delay defined as \$\tau_g=-\frac{d\phi(\omega)}{d\omega}\$, you can via a few manipulations find the link between the group delay and the quality factor you want. I have derived it in my APEC 2012 seminar but nothing fancy here it is available from many sources. If you do the maths ok, you should find \$Q=\tau_g\pi f_0\$ and this is where problems start to arise. If determining the resonant frequency from a peaky response is easy (see the above graph), it starts to be a difficult exercise for heavily damped systems. Precisely finding \$Q\$ becomes a complicated (and imprecise?) exercise but Omicron claims they have an improved algorithm for it.

Okay, assume you have the quality factor ok from the closed-output impedance plot (we will see an example later on in this post), what do you do with it? Well, you need another formula which now links the closed-loop quality factor (that you have in hand) and the open-loop phase margin of the converter you study. A way to do that is to consider a simplified version of a converter loop gain observed around the crossover frequency, ignoring what is before and after (that is the limit of the analysis in my opinion). The below sketch shows you the idea:

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If you now consider a closed-loop system determined by \$\frac{T_{OL}(s)}{1+T_{OL}(s)}\$ and solve a bunch of equations, we can determine the corresponding quality factor. After some manipulations it is possible to link the terms we are looking for:

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So this expression links the closed-loop quality factor that you extract from the output impedance plot with the open-loop phase margin at crossover. You have one point only. I have tested the method with linear circuits and it worked well on the paper. The below shot shows the type of graph you can obtain with a linear regulator where the peaking helps determining a clean group delay value:

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Simulating the open-loop gain with the classical method confirms this 31Β° phase margin at crossover. If it works well for simple systems like LDOs, I have always expressed doubts on the precision of the method applied to high-order switching converters featuring many poles and zeroes. Omicron seems to be confident that the method brings good results, I honestly don't know.

  1. the second method also deals with the output impedance but requires two measurements. It has been documented by Dr. Middlebrook many years ago and you need to measure the output impedance in open- and closed-loop conditions. The method derives from the model of a control system shown below:

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From this typical diagram, it is possible to show that perturbation like the output current and the input voltage are rejected by the sensitivity function which depends on the open-loop gain \$T_{OL}\$:

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From this expression, you can express the audio susceptibility and the output impedance when the loop is closed:

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Thus, by running two measurements, open- and closed-loop, you can theoretically reconstruct the entire open-loop gain as follows:

enter image description here

If measuring the output impedance in closed-loop conditions is not that complicated, it is different for the open-loop operation. Open-loop can be obtained by making the converter operate slightly above its regulation possibility, for instance at a slightly lower input voltage than its minimum value so that the error amp rails up. That way, ac modulation coming from the output won't pass the op-amp (which is saturated), effectively opening the loop. Unfortunately, many controllers host a protection system and the out-of-regulation situation will be flagged as an error, bringing the converter into protection mode. Not easy but doable in some cases.

I have looked at the theory behind this technique and built a PPT available here. If I could successfully reconstruct the entire loop gain from SIMPLIS simulations, my attempts to run practical measurements miserably failed: the resulting loop gain shape was ok but its magnitude value was crap. The problem, truly, comes from the measurement method and where you probe the signals. Real care must be ensured here otherwise the resulting curves are corrupt and will lead to a wrong conclusion.

Ok, enough for tonight. The preliminary conclusion is: stay away from these methods if you can. If opening the loop in the classical way works, go for it. If you can't open the loop and extract the loop gain, resorting to one of the above method (only 2. is mathematically rigorous in my opinion) is a perilous exercise with the possibility to be totally wrong in the end.

Browsing technical articles recently, I have found this paper in Signal Integrity Journal very well documented on the subject of power supply stability and including output impedance measurements.

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According to Equation 1 on page 4, $$ Z_{\mathrm{out}}(s) = \frac{Z_{\mathrm{OL}}(s)}{1 + T(s)} $$ where \$Z_{\mathrm{out}}(s)\$ is the closed loop output impedance, \$Z_{\mathrm{OL}}(s)\$ is the open loop output impedance, \$T(s)\$ is the loop gain.

They say,

The peaking in the output impedance appears at crossover frequency and correlates with the phase margin of the loop. The highest peak appears in the case of 10Β° phase margin whereas the peaking disappears for phase margin values above 60Β°.

Assume that \$Z_{\mathrm{OL}}(s)\$ is some finite value. Phase margin is evaluated when \$|T(s)|=1\$.

When phase margin is zero, \$\angle T(s) = -180 deg\$. $$ |Z_{\mathrm{out}}(s)| = \frac{|Z_{\mathrm{OL}}(s)|}{|1 + 1\angle -180|} = \frac{|Z_{\mathrm{OL}}(s)|}{1 + -1} = \infty $$i.e., a large value (peak) in the closed loop output impedance.

When phase margin is 60 deg, \$\angle T(s) = -180+60 \mathrm{deg}\$. $$ |Z_{\mathrm{out}}(s)| = |\frac{Z_{\mathrm{OL}}(s)}{1 + 1\angle -120}| = \frac{|Z_{\mathrm{OL}}(s)|}{1} = |Z_{\mathrm{OL}}(s)| $$ i.e., same magnitude as the open loop value (at that frequency); i.e., no peak (probably).

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  • \$\begingroup\$ They don't seem to be able to measure the phase margin, as much be able to tell if it is above 60 deg or not. \$\endgroup\$
    – AJN
    Aug 17, 2021 at 15:55
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Thanks for sharing. Very interesting idea, it is.

How the output impedance is used to measure the phase margin of the DC-DC Control loop.

The key concept (for me) was in page 4:

  1. "π‘…π‘œπ‘’π‘‘ can be replaced by a frequency dependent output impedance π‘π‘œπ‘’π‘‘."
  2. The structure, "Figure 2: Voltage feedback loop to stabilize the output voltage"
  3. The model, "π‘π‘œπ‘’π‘‘(𝑠)=𝑍𝑂𝐿(𝑠)1+𝑇(𝑠)".

Once the loop gain can be expressed as a function of the frequency and π‘π‘œπ‘’π‘‘, T(s) = f(π‘π‘œπ‘’π‘‘(s)), as the author did, gain and phase could be analyzed.

Extra good parts are in the examples of how to setup to find necessary parameters. Meantime, I wonder, should check, how much "Invasive" can be "Non-Invasive Stability Measurement", while "page 12, measurement setup including the 10 Ξ© injection resistor".

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