The NXP one is pretty straightforward. It mentions only Fmax (no Fclock), and names it "maximum clock frequency". So my understanding is that it's an estimate of the maximum frequency of the signal on the CLK (a.k.a. CP) port of the flip-flop. My experiments confirmed this. This circuit stoped working properly when the frequency of CLK signal exceeded 59 MHz, while NXP promised a typical Fmax around 69 MHz, depending on Vcc, temperature, and the concrete chip.
The TI datasheet on the other hand has two parameters --- Fmax (for which they give no name or description) and Fclock ("clock frequency"). They say that Fclock can be in 0 Hz - 29 Mhz range and that the minimum value of Fmax is 29 Mhz.
So it appears that min(Fclock) and max(Fclock) are nothing more than 0 and min(Fmax). But in this case, there is no reason to specify Fclock in the datasheet, since I already know it from Fmax. So I'm a little confused. Is Fclock really what I think it is, or it's something else?