I have used TFT drivers before but now I want to challenge myself by connecting an FPGA to a raw TFT without a driver.
I am having hard time understanding the basics of the signals : how RGB pins are clocked according to HSYNC and VSYNC pins ?
After so much searching I think I am supposed to signal both HSYNC and VSYNC as start in (0,0) data and then to place each row’s dot RGB data with each clock pulse but can’t figure what I should do to H and VSYNC at each row / column change ? 
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Vertical Sync or Frame Sync VSYNC defines the start and duration of a frame so one full picture, within this frame every column is initiated with the Horizontal Sync or Column Sync HSYNC.
So VSYNC is active for a whole frame and HSYNC is active for a whole column. Before both there's a backporch time, you should find these in the display's datasheet, during which the signal has to be low.
For example in this datasheet on page 17 you find the interface timings.
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\$\begingroup\$ Actually I am working on this one but the data sheet is so vague about all that timing. Do you think I should buy another type? cdn-shop.adafruit.com/product-files/2354/… \$\endgroup\$– AugAug 29, 2021 at 8:50
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\$\begingroup\$ It's indeed not a good datasheet, but I think you can figure out the timings with try and error. I'd start with alternating colored columns to see if your sync is correct. cdn-shop.adafruit.com/datasheets/KD50G21-40NT-A1.pdf seems to be better \$\endgroup\$– po.peAug 29, 2021 at 11:00
I am supposed to signal both HSYNC and VSYNC... that still involves the driver .... raw interface would involve driving rows and columns \$\endgroup\$