# Switch node ringing: How does high-side MOSFET turn-on time affect the ringing amplitude?

I was trying to understand the ringing in buck converters during turn on. The following equivalent circuit model was found in a website link.

My doubt is:

How does the turn-on delay of the switch play a role in the ringing overshoot?

The only explanation I can think of is that during turn on the switch would have higher resistance causing better damping and hence lower overshoot.

The higher the duration of this additional damping (increased Rds) being present, the lower would be the initial overshoot.

Once the MOSFET is fully ON, this additional damping effect would go away and further damping relies on stray losses (and lower Rds(on)).

Damping of the initial overshoot is more important than the subsequent portion.

• I think the linked article/blog is basically spouting words just for the sake of it. Bottom line is this; forget about trying to stop ringing and just get on with choosing semiconductors that can handle the overshoot. Other than that, you'd be better of simulating your own circuit and studying RLC filters with a step input voltage. I see nothing in that article/blog that's of any use. Commented Aug 30, 2021 at 9:06

The model mentioned in your question can be used to roughly estimate a few aspects of the ringing (e.g. resonance frequency) of the switching node of a buck converter. However, due to the countless parasitics present in a real PCB, and the influence of the mosfet driver specs (e.g. gate rise and fall time) and output filter, it will prove to be somehow inaccurate and not of much use.

As for your question, considering the simplified model, the switching node voltage at turn on (upper mosfet) can be expressed approximately by:

$$V_{SW} (t)=V_{DC}\cdot \left( 1- \dfrac{e^{-\zeta \omega t}}{\sqrt{1- \zeta ^2} )}\cdot \sin⁡ \left( \sqrt{(1-ζ^2 )}\cdot \omega t + \arccos⁡(\zeta) \right) \right)$$

Where:

$$\\zeta=\dfrac{R}{2} \sqrt{\dfrac{C_{OSS}}{L_{DC}}}\$$ and $$\\omega=\sqrt{\dfrac{1}{C_{OSS}\cdot L_{DC}}}\$$

With the peak overshoot occurring at : $$t=\dfrac{1}{2\omega}$$

• How is the MOSFET turn on time accounted in the above equation? Commented Sep 2, 2021 at 7:05
• The above model only accounts for the parasitic capacitor, inductor and the Rdson. Taking into account the rise and fall times is much more complex, and it is beyond the scope of my answer. But I assume, that the faster you switch the mosfet, higher will be the overshoot. Commented Sep 2, 2021 at 7:17