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I'm advising a friend on building an 8x8x8 monochrome LED cube. He found this popular design, but I feel like there's a lot of room for improvement.

One area in particular is this array of NPN BJTs which are connected to the VCC lines that power each layer of LEDs. (Note that VCC is at the bottom of the schematic and the layers are fed via connector at top-right.)

Schematic snippet

The tutorial describes these transistors being turned on to enable each layer:

By only turning on the transistor for one layer, current from the anode columns can only flow through that layer. The transistors for the other layers are off, and the image outputted on the 64 anode wires are only shown on the selected layer.

But I contend that they are effectively driving each layer's supply to ground (via R20..R28) when on, presumably in saturation, which is just a waste of power. (Thus inverting the functionality, meaning that the layer of interest to receive power should have its transistors turned off.)

Is that a correct assessment? Also, it is my understanding that using NPNs in parallel like this is not good design. Am I misinterpreting this or missing something obvious? (Was this done just to use common parts or be inexpensive?)

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I think you have misinterpreted the circuit slightly.

It reads on the web page that the transistors are turned on one at a time for driving the cathodes of each layer. The current for anodes for the layer is provided by other chips. Most likely the resistors are just simple pull-ups in the kilo-ohm range to discharge parasitic capacitances and to pull up the collector voltage back to VCC in reasonable time to prevent ghosting between layers.

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  • \$\begingroup\$ Sounds like I will need to delve further into the design. Thanks for the interpretation. \$\endgroup\$
    – JYelton
    Aug 30 at 20:22
  • \$\begingroup\$ @JYelton like most LED Mux's these are common cathode switches with pullup to prevent ghosting with Anode current limiting. or visa versa CA switch +cathode current limit and average brightness is only 12.5% at 20mA \$\endgroup\$ Aug 31 at 1:10
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Your assumptions are incorrect, but there are marginal flaws with heat rise.

The PN2222A is a 1 Ohm switch. Two make it 0.5 Ohms for Vce(Sat)/Ic= Rce to drive a layer of up to 64 x 20 mA = 1.28 A

  • thus it results is a low side rise of 0.5R*1.28 = 0.64V with a dissipation of 50% * 0.64V * 1.28A = 0.4W which means Tj>100'C which is not great.

  • I would choose a FET switch that would only result in a max Tj rise of 40'C.

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  • \$\begingroup\$ Also I'm not seeing emitter resistors on those transistors. Any mismatch in current gain between the paired transistors will result in one of them trying to conduct more current and therefore heating up more than the other. The current amplification of a BJT is exponentially dependent on temperature so as one transistor heats up, it will try to take even more current, making the problem worse. Obviously, this design works, but I imagine that there might be quite a few people scratching their heads over why their transistors are burning up. \$\endgroup\$
    – vir
    Aug 30 at 21:16
  • \$\begingroup\$ @vir yes hFE is PTC but Rce is also slightly PTC at max Ic so they share equally since both Vbe & Vcb are NTC and cancel out as both are forward biased in Vce(Sat) mode and the difference is Vce. But in linear mode as common emitters as we know they do not equalize since only Vbe is NTC so then you have therm. runaway, So at low currents Rce is NTC then about 2~3% of max Ic it is NP0 then PTC at above that. I wonder if Bob Pease knew that. I think MCC has specs \$\endgroup\$ Aug 31 at 0:47
  • \$\begingroup\$ on the other hand some Diodes Inc types increase PTC exponentially with current like this 0.5 Ohm switch digikey.ca/en/products/detail/diodes-incorporated/FMMT591ATA/… which can have hFE = 800/300 at low current and 80?/30 min at 1A \$\endgroup\$ Aug 31 at 1:03
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For each layer, we used two PN2222As in parallel. The collectors connected together to GND. The emitters connected together, then connected to a ground layer. The base of each transistors was connected to it's own resistor, and the two resistors connected to an output pin on the ATmega.

To get get the required 64 output lines needed for the LED anodes, we will create a simple multiplexer circuit. This circuit will multiplex 11 IO lines into 64 output lines.

Each layer is 8x8=64 LEDs. 8 Octal latches (74HC574) drive anodes for all levels and 2 2N2222's drive cathode for each level. Hard to make it simpler than that.

One resistor for 64 LEDs means 1 lit LED would be brighter than 10 and 10 would be brighter than 64, but hard to notice with multiplexing. I'd split 2N2222's so 1 is driving 32 and the other 32. Not sure how that would impact the cube!

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Based on other answers/comments and further study, the lines in question are not providing VCC to the LEDs as suspected in the premise of my question. The connector at top right is providing the GND connection via the dual BJTs, while the connection to VCC at bottom right is to speed up transitions to prevent ghosting as mentioned in comments.

LED VCC is provided by the 74HC574 flip-flops (FFs) which limits current based on the particular FF. (A Toshiba TC74HC574APF is rated 25-35 mA per pin, but 75 mA total). The FFs used by the Instructables authors had a limit of 50mA per chip.

If each FF were running at its maximum of 50mA (each output pin at 6.25mA), with eight FFs, the transistor would need to sink 400mA for a particular layer. The write-up states that the transistors they had on hand were only rated for 400mA, which I think explains why they were doubled-up.

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