# Understanding a 555 timer PWM schematic

I'm tinkering with the circuit described in Dimming the nixies but am confused by part of the schematic shown (highlighted below)

What are the potentiometer connections being described here? Is there more than a single pot. being used (the text only mentions one?) Thanks for any help understanding this!

– jonk
Sep 1 at 3:07
• The lower one sets the period, the upper one sets the duty cycle. Sep 1 at 13:06

It looks like the originator has added a 1M$$\\Omega\$$ rheostat, which would have the effect of limiting the range of adjustment of the PWM pot. When turned down to minimum resistance you'd have full range of adjustment, at maximum resistance you'd have very little adjustment range. You can leave it out (ie. replace it with a short) if you want.

Call the PWM duty cycle electrical setting $$\\alpha\$$ where $$\ 0 \le \alpha \le 1\$$. Call the second pot electrical setting $$\\beta\$$ where $$\ 0 \le \beta \le 1\$$.

You can think of it (making some simplifications) as charging the capacitor through a resistance of

Rc = 4.7K$$\\Omega\$$ + 1M$$\\Omega \cdot \alpha\$$ + 1M $$\\Omega \cdot \beta\$$

and discharging the capacitor through a resistance of

Rd = 4.7K$$\\Omega\$$ + 1M$$\\Omega \cdot (1-\alpha)\$$ + 1M $$\\Omega \cdot \beta\$$.

The on and off times will be proportional to the charge and resistances respectively, whereas the total time will not vary much with changes in $$\\alpha\$$.

The brightness will be related to Ton/(Ton+Toff) if the frequency is high enough to eliminate visual flicker.

Note: You should at least have a series resistor in the collector of the MPSA42. The way it is "designed" now it has an hFE-dependent current flowing at near Ub voltage across the transistor. That will tend to fry the MPSA42. At (say) 12V low-voltage supply, you'd get a base current of around 200-250uA, so collector current would be around 20mA (see typical DC current gain curves in the datasheet), leading to power dissipation of 4W with a 200V Ub. For a very brief period of time, followed by a 'pop', a nasty smell, and destruction of both transistors. So add something like 100K in series.

• Thanks Spehro, you have given me much to think about but I think I understand it now. Sep 1 at 3:26

The lower 1M preset is used to set the frequency as its resistance is common to both charge and discharge paths of the 4n7 capacitor.

Then use the upper 1M pot to set the duty cycle.

As the 1M preset is wound up (as its resistance is increased) it will not only reduce the output frequency but it will also increase the minimum achievable output high and output low times, that is to say it will reduce the obtainable duty cycle range available from adjusting the upper 1M pot.