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I am learning SPI protocol in serial communications now. I got stuck with the clock phase and polarity controls concept. Why there are 4 modes available other than a single universal transfer mode. What is the ground reason to run SPI protocol in 4 modes.

Also, why these transfer modes are not available in I2C?

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    \$\begingroup\$ Because I2C is designed to be different protocol from SPI. \$\endgroup\$
    – Mitu Raj
    Commented Sep 1, 2021 at 8:24

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TL; DR : SPI is a generic physical interface that can do four different bit transmission protocols to be compatible with various chip interface specifications, while I2C is a specification that defines the bit transmission protocol and physical interface. They are different interfaces built from different starting point.

Having selectable clock polarity and phase makes no sense on I2C as then you could not connect different kind of chips to the same bus. SPI devices need separate chip select pin to know they are being talked to so they can ignore clock pulses or just not load data in which allows using chips with different setting on same bus.

The clock phase and polarity is selectable because different chips use different edge to load in data. Initially the SPI peripheral was introduced to MCUs to simplify communication to various existing chips which already had various different serial interfaces - SPI literally means it is just a Serial Peripheral Interface to offload the data transfer from software bit-banging to a byte-oriented hardware peripheral.

So the SPI peripheral in the MCU was just made with all possible options one could ever need to communicate with existing chips easily. There is no formal specification or protocol of a SPI bus, it was just a helpful tool.

Sometimes you have multiple chips on bus and require different settings for each chip. And this is fine as the settings of SPI can be changed.

I2C is different as it was developed from ground up to have a specification first and then chips can be designed to meet this specification, so you don't have any variability or compability issues on the bus, as everyone must use the defined protocol. And since I2C is open drain bus, and data changes are allowed only when clock is low means that if data changes when clock is high should not normally happen then these can be used to signal start and stop conditions which don't exist on SPI.

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  • \$\begingroup\$ Also I believe SPI was Motorola's name for it and as it usually goes, other silicon vendors refused to use terms invented by the competition. So other vendors often call it some flavour of "serial-something-something" just for the sake of it. Prestige takes precedence over good engineering and standardization in all these companies. \$\endgroup\$
    – Lundin
    Commented Sep 1, 2021 at 13:50
  • \$\begingroup\$ Thanks for the answer. I have been thinking while regarding any technical reasons behind this 4 modes feature. But I could not find any other appropriate reason. If you @justme find any other more appropriate reason, kindly update this answer any time. \$\endgroup\$
    – CNA
    Commented Sep 2, 2021 at 3:51
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The concept of changing data with respect to a clock was used in many places by many people long before it was called 'SPI'. As a result, there are as many ways of doing it as there are possible ways of doing it. Good SPI hardware accommodates this by being programmable over every possible mode.

I2C was designed as a particular protocol, so there is just one protocol.

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