While reviewing simple transistor amplifier biasing techniques I came across this paragraph in Microelectronic Circuits by Sedra & Smith.

Here too we show the \$i_D–v_{GS}\$ characteristics for two devices that represent the extremes of a batch of MOSFETs. Superimposed on the device characteristics is a straight line that represents the constraint imposed by the bias circuit [...] The intersection of this straight line with the \$i_D–v_{GS}\$ characteristic curve provides the coordinates (\$I_D \$ and \$V_{GS}\$) of the bias point.

- S&S 7th Ed., Page #457

iD-vGS Characteristic Curve

I understand how the \$R_S\$ resistor provides negative feedback when the MOSFET's gate voltage is held constant. But how does it impose a constraint and provide the coordinates of the bias point? Or do the authors mean something else?


1 Answer 1


By KVL $$V_G = V_{GS} + I_{D}R_S$$

Rearranging to solve for \$I_{D}\$ as a function of \$V_{GS}\$ we have $$I_D = \frac{V_G - V_{GS}}{R_S}$$

This is a line that has a slope of \$-1/R_S\$, intersects the \$I_D\$ axis at \$V_G/R_S\$, and the \$V_{GS}\$ axis at \$V_G\$, as shown in the graph. This line is a constraint, dependent on \$R_S\$, which the \$(V_{GS}, I_D)\$ bias point must intersect in order to obey KVL. Variations in the MOSFETs' characteristics can result in slightly different bias points (e.g. one might have a higher \$V_{GS}\$ with a lower \$I_D\$, another might have a lower \$V_{GS}\$ with a higher \$I_D\$), but all MOSFETs' bias points must fall on that line regardless of their characteristics since they must obey KVL.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.