0
\$\begingroup\$

Given

enter image description here

Then let's say start with the initial state is 0 0 1 as below, so the xor gate output 1.
How can we find the next state for the given design? (The given solution for the next state is 1 0 0 ), but I can't convince myself with reasons. Any hit is appreciated.

enter image description here

Ps:while someone may consider this is a hw problem. Actually it is not since the "solution" is given as below. But I can't follow the logic to convince myself why when the initial state is 001, but the the state after the initial is 100. then 110.

\$\endgroup\$
5
  • \$\begingroup\$ We won't do your homework for you. You need to show us that you have made a substantial effort to solve this yourself, and then ask a specific question. Explain what you do understand about how the circuit works. Tell us what you think the next state should be, and why. \$\endgroup\$ Sep 7, 2021 at 22:10
  • \$\begingroup\$ Hi. @Elliot This is not a hw problem since the solution is given. I can post more if I didn't ask questions clearly. \$\endgroup\$
    – mmmm
    Sep 7, 2021 at 22:13
  • \$\begingroup\$ @mmmm Get a pencil and print out your diagram on a piece of paper. Write down the starting state for each FF on the paper. Follow through with the inputs towards the XOR and, manually, work out the value for the XOR output. All of the D inputs are now specified. In your head, now imagine the clocking pulse causing each FF to capture its input. What do you get? ("The given solution for the next state is 1 0 0 ), but I can't convince myself with reasons. Any hit is appreciated.") \$\endgroup\$
    – jonk
    Sep 7, 2021 at 22:14
  • \$\begingroup\$ @mmmm The shown values should actually be written very close to the q outputs because that's what they are. That's the whole point. I hope you understand that when they say "001" they mean "q0=0 q1=0 q2=1". Is that the problem you were having? Not realizing that part of it? Or something else? \$\endgroup\$
    – jonk
    Sep 7, 2021 at 22:21
  • \$\begingroup\$ Just because you have a solution doesn't mean it isn't homework. Whether it's homework or not you need to show your work so we can figure out where your mistake is. \$\endgroup\$
    – Null
    Sep 8, 2021 at 12:17

1 Answer 1

2
\$\begingroup\$

This answer was originally written before the Q was edited. After consulting with the OP, it's been expanded.


This is pretty straightforward. Given your initial states, the output of your three flip-flops are:

Q:dff0 = 0
Q:dff1 = 0
Q:dff2 = 1

  • dff2's input is connected to dff1's Q
  • dff1's input is connected to dff0's Q
  • dff0's input is the output of the XOR, which is 1 in the initial state.

So, when the clock pulses (and I'm doing this out of order on purpose):

  • dff1's input D is 0, so it's output Q will remain 0.
  • dff2's input D is 0, so it's output Q will switch from 1 to 0.
  • dff0's input D is 1, so it's output Q will switch from 0 to 1.

Thus, the next state solution of 100.

Remember, the clock will push whatever the value is on pin D (e.g., D:dff2=0 in the initial state) to pin Q (therefore Q:dff2 switches from 1 to 0).

The fact that dff1 doesn't change state in this example is important. It takes the effect of the XOR out of the example (reducing analysis complexity). Think of it this way. If you erase the XOR and simply say the initial state on D:dff0 is 1 you'll get the same output and it might make the clock event more understandable for this example.


OK, part of what's throwing you off is that you think the word "counter" is numerically relevant. You're expecting something like 1, 2, 3, 4... However, a "counter" in the world of boolean logic is nothing more than a circuit that cycles through all the numbers ("states") without ambiguity.

In other words, it's a lot easier to think of this circuit as a state machine than it is a counter. Let's start with what you already know, the XOR logic.

XOR
00>0
01>1
10>1
11>0

We know our XOR inputs are Q:dff2 and Q:dff0. So let's develop a state map (a list of states and what they would become after the next clock cycle). Note in this example that I'm starting with a traditional boolean progression (something like 0, 1, 2, 3...). Remember, the output of the XOR is the input to dff0. (NOTE: "012" is shorthand for "dff0, dff1, dff2.")

012 X > Next State
000 0 > 000 (can't get out of this so it's an "illegal state")
100 1 > 110 (this is your stated "initial state")
010 0 > 001
110 1 > 111
001 1 > 100
101 0 > 010
011 1 > 101
111 0 > 011

Now, let's reorder the state state table according to state progression. This means we're walking away from (1, 2, 3, 4...) so we can see what will actually happen as the clock cycles.

012 X > Next State
100 1 > 110
110 1 > 111
111 0 > 011
011 1 > 101
101 0 > 010
010 0 > 001
001 1 > 100 (go back to the 1st line and repeat)

Remember, this is a "counter" (in the lexicon of digital boolean logic) because you're moving (counting) based on a clock from one state to another in a predictable and unambiguous manner. And I think that's what's confusing you, because this isn't a "counter" from the point of view of counting (1, 2, 3, 4...).

Under normal circumstances I'd call dff0 the least significant bit, meaning the "number" is represented as Q:dff2, Q:dff1, Q:dff0, or 100 = 4. But because this is a "counter" only in the boolean sense I can't tell if it's progression is (4, 6, 7, 3, 5, 2, 1) or (1, 3, 7, 6, 5, 2, 4). However, I mention this only for the sake of interest, I don't think it's important. What you have is a state machine that's changing states on every clock pulse.

Finally...

It's worth noting that there are a number of "counters" in the digital boolean world. One of the most famous is the Johnson Walking Ring Counter. (Curiously, it's #2 on the list in that link.) You should become accustomed to the idea of "counters," this won't be the last time you encounter them.

\$\endgroup\$
5
  • \$\begingroup\$ Hi @Join. Yes. the question has been edited to add more detailed information to make the question more clear. but it should be the same question as: How does counter work with xor gate and 3 inputs with given counter design. While trying to understand your reasons, please points out if anything is correct. I am just trying learn the stuff myself. not a hw question since I do have a full "solution" of next states. Please point out any incorrect information for a newbie to learn. \$\endgroup\$
    – mmmm
    Sep 7, 2021 at 22:40
  • \$\begingroup\$ @mmmm Did my explanation of how the states change from 001 to 100 not help? If not, can you explain why you're confused? (example: do you not understand how a D-style flip-flop works)? \$\endgroup\$
    – JBH
    Sep 7, 2021 at 22:50
  • \$\begingroup\$ Yes. I am able to follow your explanations and it starts help me seeing the bigger picture now. if that part of the explanation is correct. Will try the same for the next state. and I need to revisit D-FF to confirm my understanding. \$\endgroup\$
    – mmmm
    Sep 7, 2021 at 22:58
  • \$\begingroup\$ How has your question not been answered? Does the circuit actually count? What sort of counter is it? There’s only 8 possible states, so it is easily worked out with pen and paper. If you think in terms of current state and next state. Current state is 001. Apply logic eqn. Next state is 100. Rinse and repeat. Don’t apply reason - it is not a philosophical problem. Apply Boolean logic. \$\endgroup\$
    – Kartman
    Sep 7, 2021 at 23:03
  • \$\begingroup\$ @mmmm I've updated my answer to be more thorough. Please let me know if this doesn't clear up your understanding of the problem. Cheers. \$\endgroup\$
    – JBH
    Sep 8, 2021 at 0:02

Not the answer you're looking for? Browse other questions tagged or ask your own question.