enter image description hereI am trying to simulate boost converter using SiC MOSFET (MOSFET MODEL = G2R1000MT17D). The boost converter specifications are:

  1. Vin = 200 V
  2. Vout = 400 V
  3. Fsw = 150 kHz

When simulating the above converter my simulation is not running. Kindly help me to figure out where I am going wrong[![LTspice schematic][2]][2]

  • 3
    \$\begingroup\$ Where is your V(out) node? \$\endgroup\$
    – Andy aka
    Sep 14, 2021 at 7:04
  • \$\begingroup\$ Hi andy thanks for asking The Vout node is across the resistor 320 ohm. \$\endgroup\$
    – Vengatesh
    Sep 14, 2021 at 10:21
  • \$\begingroup\$ I think you would change ... .options abstol=0.1 (? absolute tolerance on voltage = 0.1 V) ... .IC v(vout)=400 (ok) ... and add .IC i(L1)=2.5 ... .tran 0 5m -- proceed by little step time (5 ms, max internal step 1ns) save intermediary results and continue simulation ... it works for me with microcap v12. \$\endgroup\$
    – Antonio51
    Sep 14, 2021 at 12:41
  • \$\begingroup\$ Sure Antonio i will try and let you know \$\endgroup\$
    – Vengatesh
    Sep 14, 2021 at 14:51
  • 3
    \$\begingroup\$ @Vengatesh The reason Andy asked about V(out) is because you have an .IC condition for a node named OUT, but there's no such label attached, anywhere. Therefore your .IC has no effect. Try ading ic=380 to the capacitor, maybe also rser=10m. It might help to add rser=10m rpar=10k to the inductor, rser=10m cpar=1m to the voltage source, add a capacitor across the SiC with 100p rser=100. There's not much else to do since the library that I have (from genesicsemi.com, Cree needs registration) is encrypted. \$\endgroup\$ Sep 14, 2021 at 15:36

1 Answer 1


Here are my simulations about "starting" behavior.

UJ3C120080K3S for SiC (1200V 8A) and 6EWH06FN-E (600V 6A) for diode (should be changed). I will update ... diode voltage too low. Changed for a 1200 V. Peaks are same.

You can see that there is (ok, there are short ... but not negligible when choosing devices ...) important peaks of voltage of capacitor and current of inductor. (Can be "avoided" or "admissible" by an "intelligent starting" phase, duty cycle = ~ 5%, then increased progressively until what is needed)

enter image description here

NB : Simulation done at 200 kHz (duty cycle = 50 %)

For stationary picture, add : .ic v(Vc) 400 and .ic i(L1) 2.5 ...

enter image description here


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