So far I have somewhat successfully used a shift register (74HC595) and an output expander (PCF8574) to control FETs and BJTs. The main drawback so far seems to be that the chips I’m using have undefined values for the output pins at power on, so sometimes the pins are high, sometimes low (and it appears somewhat random). The upshot is that I before my microcontroller comes online and initialises the shift register or output expander, the system is in an undefined state (and things randomly turn on that aren’t supposed to).

I’m not asking for a product recommendation, but some guidance on how to effectively and correctly find a shift register or output expander which has guaranteed low signal on the output pins at power on would be very helpful. Is it a case of trawling datasheets, or is there a more effective way to find the chip I’m looking for?

Edit: Changed question title to be more relevant to the correct answer.


1 Answer 1


As stated in the datasheet the 74HC595 has an MR pin (manual reset) on it that can be used to reset all the registers to low. The MR pin (10) is called SRCLR on the TI datasheet. It also has an OE pin on it to put all the outputs into a high impedance state.

To make the outputs low at power-up you can have OE asserted high and put pull-down resistors on the outputs.

The obvious option for connecting the OE pin is to put a pullup resistor on it and also connect it to a pin on your Microcontroller. At powerup the MCU pin will probably be high impedance, so OE will be high and the outputs (Q0-Q7) will be high impedance/pulled-low. Your code can then shift valid data into the shift register and then set OE low to enable the outputs.

  • \$\begingroup\$ Huh, I've used the '595 for years and never realized the master reset only resets the shift register flops but not the output latch flops. Hope the idiot that thought that was a good idea got fired. So yes, only way around it is to tri-state the outputs with OE and put in explicit pulldowns if lines don't otherwise come up low naturally. \$\endgroup\$
    – td127
    Sep 15, 2021 at 2:48
  • \$\begingroup\$ @td127 Using the MR reset pin was my first thought as well, but one would also need to somehow provide a valid STCP clock rising edge at startup, and even then there could be a small glitch during the time between power becoming valid and the clock pulse. \$\endgroup\$
    – user4574
    Sep 15, 2021 at 13:57

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