I need to build a DIY protection board for a university project. We are not allowed to buy one online so I have to construct it myself.

I have found a variety of schematics accomplishing the same thing, however, I do not know how to scale one up to use for my purpose. Most of them are for 3-4S configurations, on the other hand, mine is 18S6P with 72V-100A ratings.

Is there any way to make this thing work for my aim?

4S30A Protection Board Schematic

DW01A and HY2213 are pretty simple to understand and they do not require further adjustments for my configuration. I can only assume that the power MOSFETs are the issue here.

My goal is to duplicate the DW01A and HY2213 parts 18 times and change the MOSFETs for 100A rating. Is this something I can do or am I just tricking myself?

  • \$\begingroup\$ Please edit the question to limit it to a specific problem with enough detail to identify an adequate answer. \$\endgroup\$
    – Community Bot
    Sep 15 at 10:36
  • \$\begingroup\$ Requirement is clear enough. \$\endgroup\$
    – Russell McMahon
    Sep 15 at 21:23
  • \$\begingroup\$ You could try building it with 100 V FET's. Execute your testplan to see if it meets all the specifications. You do have a test plan for your BMS, right? But it is just about the most minimal BMS possible. Usually 18S BMS's have a few more features. \$\endgroup\$
    – mkeith
    Sep 16 at 4:44

It looks like someone has to answer. I assume you understand the circuitry:

  1. The bottom DW01A detects the voltage drop on R004||R004, that is current sensing resistors.
  2. Each DW01 detects OC and OD, sends signal down the string of 1Mohm-s to cut off the switching FETs.
  3. HY2123 turns on the bleeding resistors at a set voltage.

Is there any way to make this thing work for my aim?

Yes, as you said, calculate the voltage and current and adjust the parts. You can make 18S6P in a single group, or combine multiple of small groups in series and parallel.

However, though you did not invite any other answers, I have to advise, from my experience in designing BMS; I wouldn't feel safe to see any battery packs around with this circuitry, especially for 18S6P Lion battery pack carrying 7200W instant power.

  1. If 18S goes in a group, the control signal from the top goes down 18Mohm resistor, 18 of 1Mohm cascaded, relying on the cells down the string. It will be sensitive to any noise.
  2. Too many parts are on the critical path, that can bring failure rate high, and any failures are crucial.
  3. There is no error detection except OC & OD, no warning, no diagnostics.
  4. Multiple point failure can not be detected.
  5. Balancing circuitrys become shunt voltage regulators, if it does any good, limits the battery capacity, wastes charge against the effort to reduce current consumption using high impedance signal paths.

The worst concern is safety. Sorry to say this, but it would feel like a time-bomb.

  • \$\begingroup\$ Would you be kind enough to explain the purpose of the 510k resistors, the transistors connected to the 510k resistors and string of 1Mohm-s? \$\endgroup\$
    – swichztra
    Sep 25 at 6:13
  • \$\begingroup\$ @swichztra DW01A drives PNP TR-s through 510k, when the OC/OD pin is low. Base drive current is about Ib = (Vbat - Vbe) / 510k = 3 / 510k => 6uA. That current, in turn, drives the NPN TR (3904) base through 1Meg ohm string, (Vbat - Vce) / 1Meg => 3.2uA. Eventually, the 1Meg ohm on the NPN collector (& FET gate) is driven, switches the FET-s. \$\endgroup\$
    – jay
    Sep 25 at 14:32
  • \$\begingroup\$ What is the purpose of those 10M resistors sir? \$\endgroup\$
    – swichztra
    Sep 30 at 11:52
  • \$\begingroup\$ @swichztra I do not know. Since the circuit components are such a high impedance, they might need to compensate/bleed leakage and parasitic with 10M & 0.47uF. \$\endgroup\$
    – jay
    Sep 30 at 16:41
  • \$\begingroup\$ I see, I re-did your calculations again: Ib = Vcc - Veb(on) / Rb = 3.7-0.65/510k = 5.7uA and Ic = Vcc-Vec(sat)/Rc = 3.7-0.25V /1x10^6 = 3.4uA, so the question is how would these calculations be affected if OC/OD pins were high. What are the output of the OC/OD pins if they are high and the associated calculations with them. Because I understand that the PNP transistors are driven when the pins are low but what about when they are high? \$\endgroup\$
    – swichztra
    Sep 30 at 18:46

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.