I am reading a book on op-amp and its applications in linear-integrated circuits and came across this topic of creating an op-amp circuit with very high input impedance. I believe that I understand the part about the dc-coupled voltage follower (correct me if I am wrong) where the author advises the reader to use an op-amp with a bias current in the range of nA (for a voltage follower) so that the voltage drop across the source resistance \$R_{in}\$ is minimum. This leads to minimum difference between the input voltage at the non-inverting terminal and the output voltage \$V_o\$ and hence the performance of the voltage follow is satisfactory.
Now from the part about the ac-coupled voltage follower, I understand that the coupling capacitor eliminates the dc offset (if any) in the input signal. From this document, I understood that
For the op-amp to operate correctly, these inputs must be DC biased. That is, the DC bias currents (\$I_{B+}\$ and \$I_{B-}\$), must be able to flow into or out of the input terminals.
and hence we need to add a bias resistor \$R_1\$ that connects the non-inverting terminal to the ground and creates a path for \$I_{B+}\$. Here the book mentions that:
this bias resistor drastically reduces the input resistance of the follower circuit. In fact, the input resistance is equal to the bias resistance.
Here I want to understand how the bias resistor has reduced the input resistance and how, specifically the input resistance is now equal to the bias resistance.
Then the author explains that we can fix this by bootstrapping the bias resistance. This is done by adding a resistance \$R_2\$ and connecting the output to the node in between \$R_1\$ and \$R_2\$ via a capacitor \$C_2\$ (as shown in fig 6-22(b)). As the gain of the voltage follower is 1, drop across \$R_1\$ is now almost zero (see text) and the input resistance is now high again.
I want to understand this part, please explain bootstrapping and how it is useful here and why do we need the second capacitor when we have already eliminated the dc offset using the first capacitor. Also by reducing the drop across \$R_1\$ we are now restricting the bias current so doesn't this defeat the original purpose?