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I have a circuit in which I have to have a retriggerable one-shot pulse generator. The trigger event is an edge from a comparator. After the edge, a single positive pulse should be generated, duration given in (n)seconds. I'm aware that this task can be realized with a complicated mixed-signal circuit (like building a complete controller from discrete parts), but perhaps there is a simple and easy way?

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  • \$\begingroup\$ Are you already trying PWL() to generate that initial single pulse? \$\endgroup\$
    – jonk
    Commented Sep 16, 2021 at 3:01
  • \$\begingroup\$ Why would the PWL be different from a usual pulse generator? PWL does not make the generator triggerable \$\endgroup\$
    – nsvinc
    Commented Sep 16, 2021 at 11:04
  • \$\begingroup\$ No, it's not triggerable. That's why I was asking what you were using for the initial pulse. You can make a .SUBCKT that will do what you want, though. Look at the sw part, to start. \$\endgroup\$
    – jonk
    Commented Sep 16, 2021 at 11:11

2 Answers 2

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There are three methods I can think of now: one method is to use the trigger keyword for the voltage source, another is to use the dflop, and the other one is to use two AND gates:

test

V(ctl) is randomly chosen as the controlling voltage.

The trigger solution seems to transform the voltage source into a behavioural source, internally, because the edges are affected and the time resolution can suffet (e.g. try with ton=100n and no pulses will be seen). Imposing a tighter timestep can overcome this limitation. The advantage is that the pulse comes exactly on time.

The dflop is used here as a self-resettable latch, with td setting the pulse width. The advantage is that you can use the temporal helpers, tau and tripdt to get very nice edges, but the disadvantage is that the pulse will come delayed by td.

I'd recommend the third solution, which has the advantages of both of the two previous examples, and two gates are hardly an encumbrance. A2 is really an inverter, so it can be replaced if it doesn't suit you.

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    \$\begingroup\$ Always enjoy your contributions with LTspice! +1 of course. \$\endgroup\$
    – jonk
    Commented Sep 17, 2021 at 7:06
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LTSPICE doesn't have a primitive element to do this. You will need to design a circuit that does what you want.

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