# Why is pull down resistor path of least resistance for the "floating" noise?

This question often pops up from people learning about pull up/pull down resistors. Why people ask it, is easy to see, it is a logical question to ask.

If the pull-down resistor is bypassed at logic high voltage, because it is not the path of least resistance, why is it the favoured path for the electromagnetic noise that causes "floating" logic issue?

Since this is a question many people have, I'll clarify it a bit. To me and those asking the question, the two images below, would be predicted to behave the same. But, clearly, they do not. In the open switch circuit, the voltage drains away and does not trigger logic high voltage. But in the closed one, it does not drain away, and reads as "1".

Adding some context. An explanation that makes sense is that the tendency of the input to prevent electric current, varies depending on if the current is from the voltage provided, or, from noise. A very shallow look at "impedance" concept, says that it does vary depending on different factors while resistance does not, https://electronicsclub.info/impedance.htm. This would make sense. If this is the explanation, it seems like it would be very easy to point that out. It obviously has to have something to do with electrons preferring R1 over the other path only when they come from noise.

This question is asking the same thing, How does the pull down resistor work in this circuit?, and this one, Understanding pull down resistor current flow, and this one, How does a pull-down prevent a "false 1" in a pin?, all on Electrical Engineering stackexchange. I also saw lots of people asking the same thing on a YouTube video on pull down resistors, here are some examples all from same video:

So it is a common question people have, and it's pretty easy to understand why they ask it and what they ask about.

I am asking because I don't get why the preferred path changes direction when the switch closes.

• Hi, You are still asking about pull-up resistor usage and meaning in your previous question (or at least you haven't accepted an answer, so it appears to still be an open topic for you). Perhaps it is a bit too soon to be asking about the closely-related topic of pull-down resistors in parallel with that question? (No pun intended :-) ) At the very least, I recommend you edit this question to include your understanding of the previous one. Thanks. Commented Sep 16, 2021 at 14:52
• "I haven't accepted an answer. I don't agree with either of them." That's fine, but readers here should be aware of the potential overlap between the two questions, as you have now confirmed the previous question is still an open-topic for you. "Your comment here does not add to this question." I respectfully disagree - site members should be made aware of your previous question, so they can read it and avoid wasting time telling you things already mentioned there. "If it is forbidden to ask two questions" It is problematic, if there is potential for overlap, as in this case. Thanks. Commented Sep 16, 2021 at 15:06
• I think you're looking for something very deep and meaningful here. It's just a push-button and a resistor. Commented Sep 16, 2021 at 22:06
• "If the pull-down resistor is bypassed at logic high voltage, because it is not the path of least resistance ..." Nothing is "bypassed" when the switch is closed. As explained in my answer to your previous question, the switch and the resistor form a potential divider both when the switch is open and when the switch is closed. In the open state the switch has an extremely high resistance and when the switch is closed the switch has a very low resistance. My answer shows the simulation results for both cases. Similarly the noise will have a high source impedance and the divider rules apply. Commented Sep 16, 2021 at 22:19
• The pull down is not bypassed at high logic levels. It carries current and follows Ohm's law. Commented Sep 16, 2021 at 23:45

Pull-up and pull-down resistors are used for exactly the same reasons. Which one you use depends on whether you want the default (switch open) state to be High (use pull-up) or Low (use pull-down).

Inputs of many logic circuits and microcontrollers are very high impedance, and, if left unconnected, will wander randomly between High and Low logic levels. The pull-up/down resistor will pull the input to the desired default value when there is nothing else pulling the input to the opposite value. The resistor allows other sources to pull the input to the non-default state.

 To address your latest edit: "I am asking because I don't get why the preferred path changes direction when the switch closes."

The preferred path is the one of lowest impedance. When the switch closes, which path is the lowest impedance changes.

The reason is because the resistor has infinitely less resistance than the switch when it is open. It also has a lot less impedance than the noise source.

When the switch is open, the only path for current is ground via R1. Assuming Vout is high impedance (compared to R1), noise that is impressed on the circuit (appears as voltage from a high impedance source) drains away through R1 before that voltage can get high enough to trigger Vout. This is because the source-impedance of the noise is much higher than the resistor.

When the switch is closed, that path is much lower impedance than the path to ground via R1 (or the noise), so the voltage can easily rise high enough to trigger Vout. The lowest impedance path is now between Vcc and Vout.

Understand that Vcc and GND are low impedance nodes, while Vout is high impedance. R1 might be seen as "medium" impedance. Current will flow more through the lowest impedance path.

simulate this circuit – Schematic created using CircuitLab

Think about where the current goes and what happens to the voltage across the resistors. Pick a Vcc, pick a noise voltage (even though it is usually a type of A/C, pick some voltage) and use Ohm's law to calculate voltage at Vout and currents through the resistors. It will all become clear.

• Doesn't add up. It should be easy to see what people ask when they ask about this. Your answer seems contradictory, "Assuming Vout is high impedance (compared to R1)", "The lowest impedance path is now between Vcc and Vout.". Either there is a component you skip over, or, I am missing something in what you explain. Commented Sep 17, 2021 at 19:01
• One explanation I considered is that Vcc is direct current, and might be less impeded than alternating current noise. Or, that there is a capacitor effect, and that "floating" tends to build up gradually, and "leakage current" through the resistor, even though it isn't the preferred path, is enough to prevent build-up to logic high voltage. Commented Sep 17, 2021 at 19:02
• @LearningBasicComputerScience Vout is always high impedance, it is the Vcc that is low impedance. When Vout is connected to Vcc, there is a low impedance path to Vcc that drains away noise before it can produce enough voltage to trigger Vout. Floating just means undefined, and therefore extremely susceptible to noise from the local EM field. Commented Sep 17, 2021 at 19:49
• @LearningBasicComputerScience You say "Electricity from noise will not trigger the input, but instead drain away through pulldown. Electricity from the power supply will trigger the input, and not drain away through the pull down. There must be some logical explanation that explains why that isn't a contradiction." The explanation is Vcc is a low impedance source, but the noise is a high impedance source. Current from Vcc DOES drain away via R1, but since the source is low impedance it can keep up, while the noise cannot. Commented Sep 17, 2021 at 21:36
• Added an 'm' suffix to the filename (not the file extension). 's' for small, 'm' for medium, 'l' for large. Little known though it's in the Help. Otherwise the image needs a lot of scrolling on a mobile or PC and readers lose the flow of the question. It's now a nice size relative to the question text. Hope the info' is useful for future posts. Commented Sep 17, 2021 at 21:39

I want to have a stab at this, because I understand that the "hand wavy" explanations online about switches and pull-ups and pull-downs tend to leave people asking more questions than were actually answered. I hope I can put at least some sources of confusion to rest.

Every instance where a resistor is combined with a switch to obtain some logic high or low depending on the switch postion, is just a voltage divider. In your case, it's a voltage divider with a capacitor connected to its "output", being the input capacitance of whatever input you are driving.

simulate this circuit – Schematic created using CircuitLab

In other words, the voltage at x is equal to:

the product of

• The total potential difference across the divider chain
• The fraction of the total resistance R1 + R2 represented by R2

offset by

• The voltage present at the bottom of the divider chain

This is independent of current in the chain, and while that's an important consideration, I won't be talking about current just yet. Focus on the potentials.

This equation is an unassailable fact. It always works, for signals up to many many megahertz, and I don't care if the top of the chain is lower in potential, higher, millivolts or kilovolts, it falls right out of the application of undisputed Kirchhoff's and Ohm's laws. I can use it to know what the potential at x is, regardless of the signs or magnitudes of the potentials at a and b. Check for yourself:

simulate this circuit

From those examples, you can make an observation that Vx is closest to Va when R1 is small compared to R2, and similarly, when R2 is smaller, Vx tends towards Vb. In other words, R1's influence on Vx is such that it that causes Vx to approach Va as it gets smaller in resistance, and conversely R2 causes Vx to become closer to Vb, giving rise to the terms "pull-up" and "pull-down". If Va is more positive than Vb, you could call R1 a "pull-up", and R2 a "pull-down". That's all there is to this, it's only indirectly related to current by Ohms' law, and these terms are referring to the resistor's influence on the voltage at x, not current, or anything else.

I included indications of current flow (blue arrows), just for completeness, but again, I remind you that current results from the application of potential difference, and will depend on R1 and R2, but it has no bearing on the (unloaded) voltage at x. Current does not appear in our divider equation.

If we consider a switch to be a variable resistance which is either very low (0Ω) or very high (∞Ω), depending on whether it is pressed or not, then we can place it in the voltage divider, and treat it just like a resistance:

simulate this circuit

Applying the formula with these values for Va, Vb, R1 and R2, yields the expected voltages Vx, and to drive the point home, I don't care one iota about current direction or magnitude (at least, not yet).

I want emulate a MOSFET gate input, like you'd find in most CMOS digital ICs, which would be some capacitance, perhaps to ground perhaps to Vcc, perhaps to some other potential entirely. I'll compare five resistive voltage dividers, all indentical with the exception of their capacitive loading. The first has no capacitive loading at x, one has a capactitor to ground, the next to Vcc, one to some arbitrary potential, and the last one with capacitors all over the shop:

simulate this circuit

When we plot how the voltages $$\V_{OUT1}\$$ to $$\V_{OUT5}\$$ evolve over time, we get this:

Notice that $$\V_{OUT1}\$$, with no capacitive load, starts and ends at 1V, but crucially, given enough time, all the others converge to that same value. Whatever currents are flowing are causing each and every capacitor to charge to exactly the correct potential difference across it, so that $$\V_{OUT}\$$ is 1V.

What this means is that in the long term, it's as if the capacitors are not there. Their only influence is to delay the settling of the circuit to that "final" output voltage, the level defined by Va, Vb, R1 and R2. The capacitors are a hinderence, but only for a while.

The rate at which this convergence happens depends on the resistances and the total input capacitance, and now current certainly plays a more direct role in the divider's behaviour.

If you want $$\ V_{OUT} \$$ to slew really fast, you must have low resistances for R1 and R2, or low input capacitances, or both.

When we use a switch in place of one of the resistances, that switch, when closed has a very low resistance, and will charge/discharge any capacitance very quickly. However, when the switch is released (opened), the rate at which the capacitor charges to whatever the new "target" voltage level is, will be slow in comparison, because charge current is now determined entirely by the other resistance.

To address the problem of noise that can find its way onto to $$\V_{OUT}\$$, either electromagnetically or inductively, from the environment, it's sufficient to model the situation as a three-way resistive network with three source potentials instead of two:

simulate this circuit

It's not really possible to call this a "divider" any more, and the algebra describing its behaviour is a lot more complicated, but we can assess it very effectively with only intuition.

By the same argument we used to call R1 a "pull-up" resistor, and R2 a "pull-down", we could call R3 a "pull-everywhere-else-at-random" resistor. R3 will be determined by things like the length and proximity of the various current paths to noise sources, and the loop area formed by those paths. You aim to keep loop area as small as possible, connection paths as short as possible, and noise sources as far away (or as isolated) as possible.

However, by far the easiest approach to minimising the influence of point c on OUT is by ensuring that R1 and R2 are very very small compared to R3. That's why low values for R1 and R2 (or just R in the switch+resistor divider scenario) are better at overcoming noise at the output than high values.

You may think of it like this: if the current flowing through R1 and R2 is high compared to the noise current entering or leaving via R3, the influence of R1 and R2 on the output potential at x will be far more significant than the influence of noise via R3. We say that low resistances are "strong" influences, high resistances are "weak", which explains terms like "weak pull-up".

For high currents, you need low resistances. We call the combined ability of R1 and R2 to determine the output voltage in spite of forces trying to upset it, its "impedance". For low values of R1 and R2, we say that they form a "low impedance" voltage source, and vice versa. The lower the impedance of the source of signal at x, the better noise immunity and slew rate you achieve, but the cost is reduced power efficiency.

• Not really seeing much of a signal in the noise in your answer. My own thought, is that the resistance to current flow through a transistor (using transistor as example just like in figure 2 in my question), the base-emitter current, decreases when a voltage is applied. And that this makes that path favoured when a power source is connected. What are your thoughts on that? Commented Sep 20, 2021 at 0:29
• @LearningBasicComputerScience I consider the "noise" to be in the understanding, which has been muddied by ELI5 explanations on Youtube and other sources. Terms like "path of least resistance" and the anthropomorphisation of electrons that "prefer" one path over another are fine until you have real questions, like yours. This answer is as close to "noise free" as possible, without being so technical that a person beginning to ask the "real questions" can't understand. It sits somewhere between a Youtube explanation designed for a beginner and a formal academic treatise... Commented Sep 20, 2021 at 1:18
• My best guess at the moment is that the Ohm of the base-emitter current of a transistor decreases as voltage applied on it increases. And that this makes it the preferred path, at a threshold. It is a perfectly logical explanation, so, it is what I'd guess. Commented Sep 20, 2021 at 1:32
• @LearningBasicComputerScience I intended this answer to be purely signal, to represent the truth of the subject distilled down without the noise for a not-so-beginner. In my experience, problems understanding are not necessarily missing information, but rather something already known being either misleading or just plain wrong. Commented Sep 20, 2021 at 1:32
• @LearningBasicComputerScience I am sorry I can't be more helpful. I do feel a little sad that I haven't been able to give you some kind of "aha" moment, and I feel part of the system that is failing you. Commented Sep 20, 2021 at 1:34

I've previously explained the idea of impedance. In short, a trace in a high-impedance (undriven) state, besides floating to an unknown voltage level, is also vulnerable to noise pickup. The larger the trace, the more vulnerable it is (that is, it has a larger 'antenna' to pick up other signals.)

So the pull-up (or -down), besides guaranteeing a valid level in the absence of a driver, also lowers the impedance of the trace by providing a path for the noise to go to, besides charging or discharging the inputs downstream.

It's also possible reduce impedance with a capacitor and use a very weak pullup to do the same thing. It's a useful technique to help with noise immunity.

Here's a simulation of various tie-off scenarios involving a CMOS input (simulate it here).

About Falstad. Falstad is a Javascript-based interactive circuit sim that you can edit yourself. Falstad has some visual aids, including the 'current speed' that you adjust that to see where the current is flowing. You can also add scope probes to monitor current and voltage as needed.

About the circuits: Each sim is a typical CMOS input. It's modeled as a MOSFET P-N pair that forms an inverter, with a pair of ESD (electrostatic discharge) protection diodes that limit the gate voltage to between GND and VCC.

Now, let's go over the scenarios:

• (a.) Floating input. The P-N pair biases to midpoint, due to the slight leakage of the ESD protection diodes. Both transistors are on, biased in linear mode, causing wasted DC current. Output sits at 2.5V.
• (b.) Noise coupling. The P-N pair inverter amplifies it to a full-strength signal. Output follows noise.
• (c.) Pull-up. Some noise makes it through, but not enough to trigger the inverter. Almost all the noise flows through the pull-up. Output stays low.
• (d.) Pull-down. Again, some noise makes it through, but not enough to trigger the inverter. Almost all the noise flows through the pull-down. Output stays high.
• (e.) Weak pull-down + noise reject cap. Some noise makes it through, almost all of it (>95%) is shunted to ground by the cap. Output stays high.

In each case the noise source is a 400Hz square wave signal: not a high base frequency, but being a square wave it has infinite harmonics so it will couple strongly even though its toggle rate is low.

In cases (b.), (c.) and (d.) I've provided a lower-impedance path for the noise, taking it away from the CMOS input:

• Switch open, noise flows through the termination.
• Switch closed, all the noise flows through the switch.

Finally, in case you were wondering, typical CMOS gate input pin capacitance is about 3-7pF. This is given in an IC datasheet. This gives an idea of its high input impedance, and why it's important to tie it off properly.

• No, by “dynamically powering” I mean switching the termination voltage depending upon when the switch is read. If you look at that posting you’ll see that the OP wanted to read DIP switches that are always on or always off, and wanted to do so in a way that didn’t waste power. Commented Sep 17, 2021 at 19:48
• I understand pull up resistors. Seem very easy to understand. What I wonder about is pull down resistors and the preferred path seeming to change when switch opens/closes Commented Sep 17, 2021 at 19:48
• Ok but I have no trouble understanding pull up resistors. I only have one specific question, and it is on pull down resistors. Why the noise escapes in one direction but the logic high signal in the other. I pointed to 10 other people asking the exact same question to show that it might not be that weird a question, socially. Commented Sep 17, 2021 at 19:54
• I will say this again: it makes no difference, pull up or pull down. It’s all about the impedance. This is why folks are frustrated with your line of reasoning, some of your assumptions make no sense electrically. I suggest, if you want to convince yourself of this, is create models for both pull-up and pull-down and simulate them. Try Falstad, it’s an online sim that’s really easy to use and it visualizes the current paths. Commented Sep 17, 2021 at 20:18
• @LearningBasicComputerScience The why is Vcc is a low impedance power source, and the noise is a high impedance power source. That explains it entirely. Commented Sep 20, 2021 at 13:53

Having understood what I missed, I’ll answer this question, in the way I think it explains what I asked. This could benefit anyone else who had the same question.

I assumed the pull down works by creating a “preferred path” for noise so that it bypasses the base. I also linked to a dozen other people who made the same assumption. This assumption is false.

How they actually work, is by connecting the base to a negative voltage. In schematics, this is shown as “ground”. I’ll skip the “ground” concept in my explanation.

Transistors can be in three states. They can be in “neutral”, and block electricity. They can be in “off”, and block it even more. And they can be “on”, and conduct electricity.

Transistors are turned “on” by a positive voltage at the base. And, “off” by a negative voltage at the base. And, they are in "neutral" with no voltage at the base.

It would be easiest to use transistors with just the “neutral” and “on” modes, since that is enough for them to either conduct or not conduct electricity. But, the wires in the circuit act as antennas and currents can be induced in them from electromagnetic “noise”, and it might be enough to turn the transistor “on”.

By adding the “off” mode (replacing "neutral" with it), any “noise” is outcompeted when the transistor is “off” (and already was when it is “on”. )