# How does logic 1 get passed through an NMOS pass transistor?

I'm studying pass transistors. One thing I came across in several of the books is that when an NMOS has a logic state HIGH and the input terminal (the schematic below) is also HIGH, the output terminal will be HIGH (a weak HIGH to be more specific) as well. Most of the books draw the output terminal open (and nothing attached to it) so for the NMOS device to be on initially it had seen the "Output" named terminal being in a lower potential but actually the terminal is open, not connected ground or anything. So,

What is actually happening here? How can the NMOS device consider the open terminal it 0 volts initially and consider it as the source terminal and Vgs > Vth so channel forms and we get a weak HIGH at the output?

(I know that there's parasitic capacitances at each terminal of a MOS device. Is it because the parasitic capacitance has initially 0 charge? Maybe that's why it's happening?)

Previous picture before edit :

simulate this circuit – Schematic created using CircuitLab

• Check if the IRF530 has an internal diode connected between the source and drain. It's usually a characteristic of the MOSFET construction. Commented Sep 18, 2021 at 18:29
• Yes, actually it does. I guess I shouldn't have used simulation here. I'm mainly asking the theoretical perspective here. Can a open terminal in this case the "output" node be considered to be in a lower voltage? if so then why? Commented Sep 18, 2021 at 18:47
• I have edited the picture so that you can understand better. Thanks. @Transistor Commented Sep 18, 2021 at 18:53
• Sorry for the bad edit. I've corrected it. Commented Sep 18, 2021 at 19:12
• the diode (actually the bulk-drain junction) is connected to the source in most discrete MOSFETs you buy (these are LDMOS, power transistors). In an integrated circuit, there are more options, and generally in logic, the bulk of all MOSFETs is connected to ground -- not the source of the individual transistor. Commented Sep 18, 2021 at 19:47