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I have recently started building simple computing devices using logic gates inside of Minecraft. What I'm trying to build right now is some RAM, and an address decoder for this RAM. I want to build a machine that will enable you to select a bit in RAM, and then turn it on or off.

So, I would input something like 10 (This is the address) and 1 (This is the value), and it would turn the second bit on. Right now, my address decoder is designed very similarly like this Wikipedia demultiplexer example.

My machine works perfectly. But I have come to realize something: Computers nowadays have billions of bytes in RAM. Assuming computers use the strategy that is shown in that Wikipedia image to do address decoding, the address decoder must be huge, must contain billions and billions of demuxes.

So my question:

When I first began researching how I should build an address decoder, I expected there would be much more elegant way instead of billions of demuxes. Is this strategy shown in the Wikipedia image how computers do address decoding, and therefore have computers gigantic address decoders? Or do they decode it in a better way that I do not know about?

PS. I apologize if some people think that this is a LMGTFY question. I understand that this probably could be answered on google, but I'm completely new to EE concepts, I hardly know any terms, so I don't exactly know what it is I should google.

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For most RAM, the mux turns into a column select for a large grid, and an entire line of data is read out or written at once. The grid structure gives you the efficiency you need.

http://docencia.ac.upc.edu/master/DTM/docs/03-Memory%20Structures.pdf is a good PDF on the subject. It also shows a "predecode" structure which makes the decoder less complex than it would be otherwise.

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  • \$\begingroup\$ This is what I was looking for. Thank you very much! \$\endgroup\$ – Aaron Feb 23 '13 at 1:36

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