There are a lot of electromagnetics software modeling suites out there (HFSS, CST Microwave, Sonnet some I've heard of).

I want to terminate a coplanar GS or GSG waveguide with 50 ohm. I know that sizing a good conductor down to below 100 nm diameter can actually lead to resistance of this size. But as I'm no expert I still have trouble to find the right direction. Based on my question here, I'm unsure besides the 50 Ohm termination, how I have to bend the ground lines at the end. Do I have to use in any case one of above mentioned software to get here a reasonable waveguide without endless trial and error?

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The upper left might have the right termination of 50 Ohm, but the reflection happens before short-circuiting signal and ground, the upper right and lower left would be my next guesses for correctly terminated cpw, the lower right GS waveguide, basically this is a mini coil, but would probably not behave like a 50 ohm load for a very broad frequency range. Can those software packages take into account things like skin effect to simulate impedance correctly? Which software should I choose, as far as I've heard Sonnet might be best for planar waveguides and antennas

  • \$\begingroup\$ GS and GSG mean what??? \$\endgroup\$ Commented Feb 21, 2013 at 18:51
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    \$\begingroup\$ "Ground-Signal" and "Ground-Signal-Ground". They're usually used to describe microwave probes. \$\endgroup\$
    – The Photon
    Commented Feb 21, 2013 at 19:12
  • \$\begingroup\$ James, you said before you're working at 2 GHz max frequency. And your transmission line question shows that even 2 mm trace length is less than 1/10 wavelength in your transmission line structure. The length of this termination region will be much less than 2 mm. Because the size is much less than 1/10 wavelength, you probably don't have to worry about the details of the geometry very much. But if you want to convince yourself this is true, try any of the simulators you mention (I don't know SONNET, but I am familiar with the other two by reputation, at least), and they should confirm. \$\endgroup\$
    – The Photon
    Commented Feb 21, 2013 at 19:22
  • \$\begingroup\$ @ThePhoton ok thanks, so a rule of thumb is these propagation effects can be neglected when smaller than 1/10 wavelength? But you think this implementing of the 50 ohm resistance by tapering down to 50-100nm would be worth to try? \$\endgroup\$
    – James Last
    Commented Feb 22, 2013 at 9:34

1 Answer 1


Leon is correct, if the maximum frequency component of interest is under or near 2GHz you could certainly use a "lumped element" termination with a physical thin film or thick film resistor deposited or mounted between the signal and the nearby ground. A typical three cent metric "1005" or "0603" size 50 or 49.9 ohm resistor behaves pretty close to an ideal 50 ohm termination at frequencies between DC and several GHz. Look at application notes and data sheets from Johanson, Vishay, et. al. They make surface mount chip resistors of 49.9 / 50 / 100 ohms and provide details of the package indutance / capacitance, S-parameters, return loss, and so forth up to 10s of GHz for their models characterized for microwave circuits, and up to the 2 GHz range for general purpose commodity resistors. I'm not sure about the particular details of chrome or polysilicon or doped/diffused resistors made in various monolitic / semiconductor wafer processes but I am sure that several generic deposition or process technologies make wafer integrated or wafer deposited resistors in the 50 to 100 ohm range suitable for lumped element terminations from DC up into near millimeter wave / THz frequencies. 1-2 GHz is not even challenging in terms of parasitics or bandwidth for discrete lumped element or wafer level components. As another commenter said in (your?) recent other thread, you can split up the termination into two 100 ohm terminations LEFT_GND--R1---Signal----R2---RIGHT_GND if you want the local CPW ground currents to either side of your signal trace to be more balanced or better / easier you can terminate off the closed far end of a "cul de sac" where the signal trace ends at one pad of a resistor and the resistor body continues forward in the direction of the signal trace's direction before it ended so that the other pad of the resistor meets the left side / right side CPW Ground traces where they wrap around circularly convergently to meet the 2nd resistor pad at the same distance away from the signal trace as the CPW was to the left and right sides. That's like the way a layout for a SMT right angle SMA jack might be done or similar. It isn't really critical. Just as long as the lumped element size of the termination is under a millimeter or two it'll work pretty well for anything but the most exacting applications. If you want simulate with SONNET-LITE (or academic or pro versions as appropriate), PUFF, emGine, MEEP, ATLC or any number of other 2D / 2.5D / 3D CEM simulators. Or just use a metal ruler and X-acto knife to carve appropriately sized strips out of the top side copper foil on a blank PCB and test that CPW with a VNA or whatever or toner transfer PCB or pro made 1 or 2 layer PCB or whatever is easy. If you're depositing resistors due to working with wafer processing just be mindful of the skin effect vs. film thickness and any relevant inductive/magnetic effects of the film material but I doubt the errors will amount to much over the distance and the recipes for making termination resistors will be very well known and easy to find in the literature or within your workgroup that handles process technology stuff. If you had to have pretty flat termination from DC to 40GHz or something that'd be a little more challenging but just don't worry at 2GHz. In fact even if you had 3rd or 5th harmonics of 2GHz to worry about it still wouldn't be a big deal and the answer would be about the same.

http://www.vishay.com/docs/60107/freqresp.pdf http://www.vishay.com/docs/60093/fcseries.pdf

  • \$\begingroup\$ Good answer but it would be worth editing and breaking into paragraphs (press enter twice) because it's difficult to follow at the moment. While you're editing you'll see a preview window further down the screen that shows how the post will appear. \$\endgroup\$
    – PeterJ
    Commented Feb 22, 2013 at 3:19
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    \$\begingroup\$ @whatever, from James' other questions, he's probably asking about a transmission line structure on a chip, not a pcb or hybrid circuit. Adding a discrete transistor is not an option in this case. \$\endgroup\$
    – The Photon
    Commented Feb 22, 2013 at 4:45
  • \$\begingroup\$ +1 for your effort and it was interesting to read for me. So The Photon is right, the cpw cannot be longer than 1-2 mm, 10 um width, 100-200 nm gold traces done by ebeam lithography, everything on a Si/SiO2 wafer piece of 0,5x0,5mm. Thats why I was asking electronics.stackexchange.com/questions/58645/… what is the most clever way to do this on-chip-termination, a geometric termination seems easier to me than depositing a material with higher resitivitiy than gold here. \$\endgroup\$
    – James Last
    Commented Feb 22, 2013 at 9:44

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