PLL or DLL with controllable phase

Question

I have a clock signal coming from an instrument that I need to use to synchronise other instruments. However secondary instruments need to have different phases and I need to be able to sweep the clock period (100 ns > 10MHz) with 1 ns step maximum.

I managed to sweep 20 ns with an FPGA programmable DLL (minimum clk input 32 MHz so I used 50 MHz as multiple of 10 MHz), but I still have 80 ns that I can't sweep. FPGA DLL step is FREQ(50MHz)/256 ~ 80 ps.

I am looking for an IC reference of a PLL or DLL in which I can program the phase during runtime. I also accept alternative solutions.

I searched for programmable delay, programmable phase shifter, programmable PLL, however I couldn't find anything that could help me.

To illustrate, the image below shows a clock with different phases with 90 degrees step, I need around 3 degrees step maximum 3*(100 ns/360) ~ 830 ps. If I can have more precision is even better.

Answer 1

Let me recommend a programmable delay line such as this?

https://www.maximintegrated.com/en/design/technical-documents/app-notes/1/107.html

The DS1020-015 has 150ps resolution per step

Answer 2

I assume this clock is distributed over cables since you are connecting different instruments. I should point out that cable lengths should be accounted for at the time scale you seek to control. About 3ns per meter of cable is a rule of thumb. If you want 1ns shift in reference to the source instrument, then the cable might already exceed your requirement when it arrives at the receiver instruments. If the two instruments must be synchronized at that level, then a master clock source should drive both instruments so any delays from cables are canceled out and any delay you inject to one cable is preserved relative to the other.

If this is for an important experiment/development and reliability is a factor, then I would suggest a delay generator such as the SRS DG645 that is designed to take an input and provide picosecond delay outputs. Input frequency maximum for the DG645 is 10MHz IIRC. The delay generator circuit is a mix of analog and digital delays in order to properly create delays that are synchronous to the source even if it is a single event.

A more IC based option are programmable delay lines such as the Maxim DS1020-100 with a 1ns step and 256 steps. Note that a 0 step still incurs a 10 ns latency between input and output. There are other step sizes in that family down to 150ps.