The 74HC04 has 'buffered' NOT gates, which means each one is actually 3 inverters in series (one to invert the signal, and two to buffer it without undoing the inversion). As a result the gain from input to output in the transition (linear) region is very high.
Each inverter has a propagation delay due to resistance and capacitance of the FETs, which forms a low pass filter. In the linear region this causes a phase shift that approaches 90° as frequency increases. The gate can oscillate if the total phase angle (including the 180° inversion) gets to 360° while there is enough feedback (eg. through the power supply or external wiring) and gain to create a loop gain greater than 1.
With a single unbuffered gate this is unlikely to occur because the total internal phase change can't exceed 270°. However with 3 inverters in series each one only has to contribute 60°, at which frequency they may still have enough gain to overcome feedback loss. In practice this means that oscillation is almost guaranteed during slow transitions (which is one reason to use gates with Schmitt Trigger inputs for slowly changing logic signals).
I tested one gate in a 74HC04 by connecting a potentiometer to the input and varying the voltage while watching the output on my oscilloscope. When using a 10 kΩ pot the results were similar to yours, except that I saw a strong high frequency oscillation in the middle region.
When I changed the pot to a 5 kΩ unit the oscillation was much weaker and the hysteresis all but disappeared. The input voltage variation from full high to low output then reduced to ~30 mV. However the input was still very sensitive to noise. I had to isolate the multimeter with a 10 kΩ resistor in series to avoid disturbing the output when measuring input voltage.