What is the failure mode of flash memory? I've got some chips rated for 10,000 cycles - what happens after 10k cycles? Do the chips stop writing properly, do you get read errors, etc.? Does it also happen to EEPROMs?
\$\begingroup\$ Just to note, you make it sound like as soon as you hit 10k cycles the chip will just immediately fail. 10K is just the expect length. It is possible for your flash to last 100 million cycles, but it can also last just 100 cycles, and everything in between. Most manufactures try to hide their expected distribution though. \$\endgroup\$– KellenjbOct 30, 2010 at 23:27
\$\begingroup\$ I thought 10k was the minimum guaranteed value, that is some will do 10k, others will do 100k but under normal conditions they will do at least 10k. \$\endgroup\$– Thomas OOct 30, 2010 at 23:33
1\$\begingroup\$ Nope, it actually is all statistical based. Light bulbs are rated in the same fashion. They will advertise x number of burning hours, but they might fail much earlier then x and still be statistically reasonable. A manufacture can't really guarantee a minimum number of cycles, they are just giving you what their expected life is. \$\endgroup\$– KellenjbOct 31, 2010 at 19:19
\$\begingroup\$ The extremely vast majority are supposed to last for the rated life. Manufacturers publish reliability specs to say whether it's 99.9% or 99.9999999%, or more likely somewhere in-between. They can't guarantee that there won't be an occasional outlier, but they really do try to avoid them. \$\endgroup\$– supercatAug 12, 2011 at 20:44
\$\begingroup\$ I think that supercat is right, but I think that the way they do is: a device that breaks before spec costs X, lowering the spec costs Y, what is the best tradeoff? \$\endgroup\$– clabacchioFeb 27, 2012 at 14:53
Flash memory degrades as a function of the number of write-erase cycles it is subjected to. Essentially the dielectric structure of the memory cell degrades and becomes unable to maintain a 'low' state. (Think of a N-channel MOSFET - a high on the gate turns the device on, which makes the drain-source resistance low. If the gate is damaged, the drain-source channel can never be established.)
There is often a mechanism to 'mask' these bad blocks once they're identified (usually by a verify operation failing after a write) preventing them from being used - a bad block table, essentially.
See here and here for more details on the physics of it all.
Here's a project designed to destroy an EEPROM by writing to it repeatedly: Flash Destroyer
According to the comments, though, it's not a particularly good demonstration:
I am guessing that this test will actually not show the real problem very obviously, or should I say early. Since I think the real issue is that the data retention time will drop with number of writes. I.e. after 1 million writes it will store the data for a number of hours specified in the datasheet. Eventually the data retention time will be so short you will see problems, but in real-life, problems with lost data would occur much earlier.
I also asked a similar question on SuperUser: What happens when a flash drive wears out?
I suppose if your flash is broken, you can write a value to it but i doesn't take it correctly. For example, some bits are maybe unable to go low anymore which yields a different value.
Some flash drives in PC's like SSDs have controllers that monitor the broken parts of the flash chips and saves the data to different spots and reports a decrease in capacity. It's just like a normal hard drive has about 0,5% of extra sectors when some turn out to be bad sectors.
If you are speaking in normal EEPROM chips or memories that are embedded into MCU's or external, I am not sure if they got any error correction system built in. It might just write the value and not know it fails in doring so correctly.