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I am designing DC-DC boost converter and I found out that capacitors generate huge voltage spikes on output because of their inductances. Even so called "low ESL" capacitors (10-12 nH) are causing them. 11 nH I tried adding 30 pH capacitor (not from library) and it fixed the problem. 30 pH Problem now is to find such capacitor on the market. Such low ESL caps usually are too low of voltage (up to 50V) and finding them is quite hard. I looked at websites like mouser.com, but datasheets barely say "low ESL" or "extremely low ESL" without even saying how low it is.

Thus I started thinking - maybe there is a better way to design such converter? Maybe I've made some mistake I did not know about?

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  • \$\begingroup\$ if you want to go below 1nH, it is not just about selecting a particular component that will solve your problem..you have to think about the current through those caps and minimize loops. you can place several caps in parallel.. even more, create two loops nearby with opposite circularity so the inductance becomes even lower..x2y caps work on this principle but you still have to build the current loops with clever via placement. \$\endgroup\$
    – tobalt
    Oct 4, 2021 at 18:49
  • \$\begingroup\$ If you look at the scale of your Y axis compared to your DC value, it’s not that bad. Lower ESL is of course better though. What ripple are your designing for? \$\endgroup\$
    – winny
    Oct 4, 2021 at 19:56
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    \$\begingroup\$ 30 pH capacitor????? \$\endgroup\$
    – Andy aka
    Oct 5, 2021 at 7:26

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12nH is pretty large, that would correspond to the big high voltage electrolytic you put on the output.

Since e=L di/dt with di/dt depending on how fast the FET turns off (and the diode turns on) then of course output voltage spikes are directly proportional to output capacitor ESL, and inverse proportional to MOSFET switching time.

For low inductance, you can use a bunch of SMD MLCC's in parallel. Depending on how they are mounted, you'll get 1-2nH per cap, and divide by the total number of caps to get the inductance of the parallel combination. You can also use a LC filter on the output, with a very small inductor value.

Note this boost seems to output 250V on 33R, so that's 7.5A ; with 100V input voltage and a bit of losses, that would correspond to 20A input current. With these numbers, a transformer based converter would make a lot more sense.

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  • \$\begingroup\$ I tried that LC filter with small L (tried 1 - 100 nH) - nothing really changed. So as I understand it is best to use caps with low ESL in parallel to reduced total inductance. I looked up SMD MLCC's in mouser and found this (eu.mouser.com/datasheet/2/212/1/…) - it has really low ESL <1nH and high voltage \$\endgroup\$
    – Ri Di
    Oct 4, 2021 at 19:35
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    \$\begingroup\$ You can also use standard SMD MLCC it will probably be cheaper. If you make a filter, it should be a CLC filter because the output side of the diode must face a capacitor to absorb the inductor current when the FET turns off. \$\endgroup\$
    – bobflux
    Oct 4, 2021 at 19:53

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