I want to drive a quartz crystal resonator at its resonant frequency so I need to stay locked on to its resonant frequency as its resonant frequency changes. I'm using an FPGA to do this.
I want to use a PLL to stay locked on to the resonant frequency. My quandary is, how do I capture and compare the phase shift that occurs when the resonant frequency changes?
Suppose my setup is like this:
A normal PLL loop looks like this:
I would assume that in the typical PLL loop, my "VCO" is the DDS (since the frequency output of the DDS is determined by a constant value input just like a DC signal controls an AC output of a VCO) and the "reference signal" would be the response signal of the resonator (ie. the desired frequency).
Now suppose at time = 0 I know what the resonant frequency is (maybe I found it by doing a frequency sweep and looking for amplitude response). Then, some time later, the resonant frequency changes.
The "new" resonant frequency would cause the "old" frequency to phase shift. But how would I quantify this?
Typical methods involve comparing the signals in the time domain which would mean I would somehow need to save one period of the "old" frequency I'm driving the resonator at and then "overlay" that with the correct period in time with the "new" phase shifted signal such that the phase difference is apparent (they must be synchronized).
My design would look like this:
This seems very convoluted and I believe I'm overcomplicating things.